RC Pulse Filter Circuit for High-Frequency Noise Rejection
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Solution Overview
Problem
Conventional frequency selective pulse filtering circuits are inefficient due to large area consumption and complexity, struggling to distinguish low frequency data from noise and handshaking signals effectively.
Innovation Solution
A filtering module comprising an input module for charging or discharging a capacitor based on an RC time constant, with a phase detecting module maintaining identical phases and a threshold module providing feedback for optimized filtering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional filtering circuits use symmetrical parallel paths with multiple transistors to filter high frequency noise, then filtering effectiveness is improved, but area consumption and device complexity increase significantly
Solution Approach 1:
The patent extracts and eliminates redundant symmetrical parallel path P2 and its associated transistor MP2 from the conventional circuit. The invention uses a single NMOS transistor MN1 to handle both charging and discharging functions through clever circuit design, removing the need for the second path and its components, thereby reducing transistor count while maintaining filtering effectiveness.
Solution Approach 2:
The NMOS transistor MN1 is designed to perform multiple functions: it acts as both the charging transistor and the discharging transistor depending on the input signal state. The capacitor C1 serves dual purposes as both the filtering element and the memory element that maintains the output state. This multi-functionality reduces the total number of components needed.
2Measurement precision
If conventional filtering circuits use multiple transistors and complex output control modules to ensure correct data detection, then data detection accuracy is improved, but area consumption increases
Solution Approach 1:
The patent merges the output control function directly into the filtering path by using the capacitor C1's voltage state as the output. The cascode-connected PMOS and NMOS module 106 is simplified by removing the slower path, and the latching function is achieved through the inherent memory effect of the capacitor holding its charge state, reducing the need for separate complex output control circuits.
Solution Approach 2:
The capacitor C1 serves itself as both the filtering element and the state memory element. Once charged or discharged by MN1, it maintains its voltage state automatically without requiring additional latching circuitry, providing self-service memory function that reduces overall circuit complexity and area.
3Speed
If conventional circuits use PMOS transistor for fast charging but it cannot be used for high to low pulse filtering, then charging speed is improved, but adaptability to different pulse types deteriorates
Solution Approach 1:
Instead of using PMOS for charging and requiring a separate path for discharging, the invention inverts the approach by using NMOS for both charging and discharging operations. The NMOS transistor MN1 can efficiently perform both functions by controlling the capacitor C1's voltage state based on the input pulse type, achieving versatility without sacrificing speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution efficiently filters high frequency noise, reduces errors in data detection, and minimizes area and current consumption while maintaining high controllability and simplicity.
Implementation Method 1
An NMOS transistor MN1 of a first inverter 102 is tuned such that it provides desired RC time constant during discharge of a capacitor C1
Data Source
AI summary
A filtering module filters out high frequency signals, primarily noise, from an input data stream. The filtering module includes an input module, a phase detecting module, and a threshold module. The input module performs either a charging or a discharging across a capacitor on a basis of an RC time constant. The phase detecting module is coupled to the input module to keep identical phase at a first node and an output node. The threshold module is coupled to the phase detecting module for providing an output signal based on a threshold voltage and the charging or the discharging across the capacitor.