Multi-function Resistance Change Memory Cells with Configurable Drive Circuitry
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Solution Overview
Problem
Emerging memory technologies face challenges in reducing power consumption while maintaining high-speed access and data retention, particularly in miniaturized memory devices that require advanced management schemes to emulate various memory function types on a single chip.
Innovation Solution
The implementation of resistance change memory (RCM) cells with drive circuitry that provides configurable signal pulses in amplitude and duration to emulate different memory function types, allowing for efficient power management and reduced latency by varying data retention time and power consumption based on specific requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory devices are reduced in size to achieve higher storage density, then storage capacity increases, but power consumption management becomes more challenging and access speed may deteriorate
Solution Approach 1:
The patent implements dynamic power management by making the memory device operable in multiple operational modes with different power consumption levels. The controller dynamically selects between first and second operational modes based on system requirements, enabling adaptive power consumption adjustment that resolves the contradiction between high storage density and power management challenges in miniaturized devices.
Solution Approach 2:
The patent changes operational parameters by defining multiple operational modes with different characteristic values for power consumption, access speed, and data retention. By adjusting these parameters dynamically, the system can optimize performance for specific applications, resolving the trade-off between maintaining high-speed access and reducing power consumption in high-density memory configurations.
2Quantity of substance
If memory devices are reduced in size for miniaturization, then storage density improves, but maintaining high-speed access becomes more difficult
Solution Approach 1:
The patent employs dynamic operational mode selection where the controller can switch between first and second operational modes. The first mode is optimized for high-speed access while the second mode may prioritize other characteristics. This dynamic adaptation allows miniaturized high-density memory devices to maintain high-speed access capability when needed, resolving the contradiction between miniaturization and speed maintenance.
3Quantity of substance
If memory devices are reduced in size for miniaturization, then storage density improves, but data retention capability may deteriorate
Solution Approach 1:
The patent implements dynamic mode selection where the controller can choose between operational modes with different data retention characteristics. By dynamically switching modes based on application requirements, the system ensures that miniaturized high-density memory devices maintain adequate data retention capability, resolving the contradiction between miniaturization and reliability.
4Adaptability or versatility
If multiple memory function types are emulated on a single chip, then device versatility improves, but device complexity increases
Solution Approach 1:
The patent implements a universal memory device that can emulate multiple memory function types (such as volatile memory, non-volatile memory, and storage class memory) on a single chip. By using a unified architecture with dynamic operational mode selection, the device achieves multi-functionality without requiring separate physical memory structures for each function type, thus improving versatility while controlling complexity.
Solution Approach 2:
The patent segments the operational characteristics into distinct modes that can be independently selected and configured. By dividing the operational space into first and second operational modes with different characteristic values, the system manages complexity through structured segmentation of functionality, making it easier to implement and control multiple memory function types on a single chip.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient power management and reduced latency by allowing the memory device to emulate various memory function types on a single chip, improving data retention and operational speed while meeting lower power requirements, thus addressing the challenges of miniaturization and high-density storage.
Implementation Method 1
resistance change memory (RCM) cell...applying a signal pulse...configured to vary a data retention time
Data Source
AI summary
Various embodiments comprise apparatuses having a number of memory cells including drive circuitry to provide signal pulses of a selected time duration and/or amplitude, and an array of resistance change memory cells electrically coupled to the drive circuitry. The resistance change memory cells may be programmed for a range of retention time periods and operating speeds based on the received signal pulse. Additional apparatuses and methods are described.