Recursively Determined Invertible Set for Stuck-At Fault Correction
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Solution Overview
Problem
Traditional error correction codes (ECC) are inefficient for resistive memories with high probabilities of multiple bit errors, such as phase-change memory and memristor, due to excessive overhead in correcting stuck-at faults, and existing techniques like SAFER and ECP are limited in tolerating faults before failure.
Innovation Solution
The recursively determined invertible set (RDIS) approach identifies stuck-at wrong cells by determining an invertible set within the memory cells and uses auxiliary counters to correct data retrieval by inverting values from faulty cells, reducing overhead and increasing fault tolerance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional Hamming code based ECC is used to protect memory, then error correction capability is provided, but the overhead is unnecessarily large for stuck-at fault model
Solution Approach 1:
The patent applies local quality by differentiating between two types of memory cells: good cells that store data normally and bad cells that are inverted. This localized differentiation allows the system to correct stuck-at faults without requiring comprehensive error correction across the entire memory space, thereby reducing overhead while maintaining reliability for the specific fault model.
Solution Approach 2:
The patent uses inversion as a core mechanism to correct stuck-at faults. Instead of using complex error correction codes, the system inverts the logic of bad cells (stuck-at-0 become stuck-at-1 and vice versa) during read operations. This inversion approach simplifies the correction mechanism and reduces the overhead required compared to traditional ECC methods.
2Reliability
If stronger ECC is employed to cope with multiple faults, then fault tolerance is improved, but space and computation overheads increase excessively
Solution Approach 1:
The patent segments the memory cells into two distinct categories: good cells and bad cells. This segmentation allows the system to apply different handling mechanisms to each segment - normal operations for good cells and inversion for bad cells. By segmenting rather than using uniform strong ECC, the system achieves fault tolerance with significantly reduced space and computation overheads.
Solution Approach 2:
The system employs self-service mechanisms where the controller automatically identifies bad cells and applies inversion without requiring complex external intervention. The read-after-write operation enables the system to self-diagnose and self-correct stuck-at faults, eliminating the need for overly complex ECC schemes while maintaining high fault tolerance.
3Reliability
If BCH code is used for multi-bit error correction, then error correction capability is improved, but complexity increases linearly with the number of faults to be tolerated
Solution Approach 1:
The patent changes the fundamental parameter of error correction from using complex BCH codes with linear complexity increase to using a simple inversion mechanism. By parameterizing the correction approach as a binary inversion operation rather than complex polynomial division, the system achieves multi-bit error correction capability with constant, low complexity regardless of the number of faults to be tolerated.
Data Source
AI summary
Systems and methods are disclosed that facilitate storage and retrieval of data to/from memory with permanent faults. Permanent “stuck at” faults, associated with individual bits, interfere with Write operations. A memory bit with the SA-0 fault does not store the value “1” while a memory bit with the SA-1 fault does not store the value “0”. Hence, when later retrieved by a Read operation, stored data located on one or more bits having a permanent fault may be different from the data that was originally written. Techniques are disclosed that facilitate correct retrieval of data in the presence of “stuck at” faults by keeping track of the positions of the bits that are stuck at a value different from the ones that are written and then, at Read time, inverting the values read from those positions.


