Semiconductor Package RDL Stacking for Signal Path Reduction
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Solution Overview
Problem
The electrical transmission path between processors and transceivers in semiconductor device packages remains long due to their juxtaposition on the same substrate, limiting the reduction of transmission rate and increasing power consumption in optical communication systems.
Innovation Solution
A semiconductor device package design featuring a redistribution layer (RDL) with the semiconductor device on one surface and the transceiver and capacitor on the opposite surface, allowing for a shorter electrical transmission path and decoupling path, thereby reducing power consumption and improving transmission efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If the processor and transceiver are disposed on the same side of the substrate, then the electrical transmission path is shortened, but distance tolerance must be preserved for bonding process which prevents effective reduction of transmission path
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement where processor and transceiver are juxtaposed on the same substrate surface to a three-dimensional stacked arrangement. The processor is disposed on the first surface of the substrate while the transceiver is disposed on the second surface, utilizing the vertical dimension to achieve shorter electrical transmission paths without compromising bonding process tolerances.
2Use of energy by stationary object
If the processor and transceiver are disposed on the same side of the substrate, then the electrical transmission path is shortened, but power consumption increases due to limited reduction of transmission path
Solution Approach 1:
By stacking the transceiver on the opposite surface of the substrate relative to the processor, the patent creates a vertical electrical transmission path that is significantly shorter than horizontal paths on the same surface. This dimensional change directly reduces power consumption by minimizing the length of electrical interconnects between processor and transceiver.
3Length of moving object
If the transceiver and capacitor are disposed on the second surface of the RDL, then the decoupling path is shortened, but area utilization becomes constrained
Solution Approach 1:
The patent utilizes the vertical stacking arrangement to place the capacitor on the second surface of the RDL adjacent to the transceiver. This enables the decoupling path to extend vertically through the RDL thickness rather than horizontally across the substrate, significantly shortening the decoupling path while efficiently utilizing the available substrate area.
Data Source
AI summary
A semiconductor device package includes a redistribution layer (RDL), a semiconductor device, a transceiver, and a capacitor. The RDL has a first surface and a second surface opposite to the first surface. The semiconductor device is disposed on the first surface of the RDL. The transceiver is disposed on the second surface of the RDL. The capacitor is disposed on the second surface of the RDL. The semiconductor device has a first projected area and the capacitance has a second projected area. The first projected area overlaps with the second projected area.