Read Margin Measurement in Read-Only Memory
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Solution Overview
Problem
Conventional methods for measuring the read margin of non-volatile memory cells are inefficient, often requiring analog circuitry and indirect testing methods, which can lead to false positives and negatives, and are unable to accurately identify weak cells that may cause read errors over time.
Innovation Solution
A digital circuitry and method that directly measures the read margin by counting clock cycles until a transition occurs at the output of the read circuitry, allowing for precise quantification of read margin without the need for analog circuitry and enabling parallel testing of multiple cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If analog circuitry and indirect testing methods are used to measure read margin, then measurement capability is provided, but measurement precision deteriorates due to false positives and negatives
Solution Approach 1:
The patent replaces analog circuitry with digital circuitry to measure read margin. Instead of using analog voltage comparisons that are susceptible to noise and imprecision, the invention uses digital counters to tally transitions of read circuit outputs over multiple clock cycles. This digital approach eliminates the false positives and negatives inherent in analog indirect testing methods, providing both precise and reliable measurement results.
2Productivity
If conventional indirect testing methods are used, then testing can be performed, but productivity deteriorates due to inability to accurately identify weak cells
Solution Approach 1:
The patent employs a self-service testing approach where the memory cells themselves generate the test data through their normal read operations. The read circuits naturally produce transitions that are counted by the digital counter. This eliminates the need for complex external test equipment and indirect measurement methods, allowing efficient and accurate identification of weak cells through direct observation of their read behavior over multiple cycles.
Solution Approach 2:
The invention implements feedback by continuously monitoring and counting the transitions of read circuit outputs over multiple clock cycles. The digital counter accumulates transition tallies that provide feedback about the strength of each memory cell's read signal. This feedback mechanism enables accurate identification of weak cells that may not be detectable through single-shot indirect testing, while maintaining high testing productivity.
3Measurement precision
If analog circuitry is used for read margin measurement, then measurement is possible, but device complexity increases
Solution Approach 1:
The patent substitutes complex analog circuitry with simple digital components. Instead of requiring analog voltage comparators, precision resistors, and regulated power supplies that are sensitive to process variations and temperature, the invention uses digital counters and clock circuits. This digital approach achieves precise read margin quantification through integer counts of transitions, dramatically reducing device complexity while maintaining or improving measurement capability.
Data Source
AI summary
Read margin measurement circuitry for measuring the read margin of floating-gate programmable non-volatile memory cells. In some embodiments, the read margin of a cell with a floating-gate transistor in a non-conductive state is measured by periodically clocking a counter following initiation of a read cycle; a latch stores the counter contents upon the cell under test making a transition due to leakage of the floating-gate transistor. Logic for testing a group of cells in parallel is disclosed. In some embodiments, the read margin of a cell in which the floating-gate transistor is set to a conductive state is measured by repeatedly reading the cell, with the output developing a voltage corresponding to the duty cycle of the output of the read circuit.