Read Voltage Generation Circuit for Flash Memory Read-Retry

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing read voltage generation circuits for flash memory systems require a large number of registers to store multiple read voltage codes, leading to increased circuit area and difficulty in adjusting read voltages, particularly in Multi-Level Cell (MLC) memory systems where the margin between voltage distributions is small.

Innovation Solution

A read voltage generation circuit that includes a register unit to store an initial read voltage code and a counter circuit to dynamically change the read voltage code during read-retry operations, reducing the need for multiple registers and allowing for flexible adjustment of read voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple registers are used to store read voltage codes for read-retry operations, then read voltage levels can be maintained for multiple reading attempts, but the circuit area increases significantly

Engineering Contradiction:
Improveread-retry operation capabilityVSAvoidread voltage generation circuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines multiple read voltage code storage functions into a single register by time-multiplexing the storage of different read voltage codes (CODE1, CODE2, ..., CODEN) at different time points. The counter circuit generates sequential values that are stored in one register, replacing the need for multiple separate registers (301-304), thus reducing circuit area while maintaining read-retry capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a counter circuit that dynamically generates changing read voltage codes over time. Instead of using static multiple registers to store fixed codes, the counter dynamically produces sequential code values (CODE1, CODE2, etc.) that are stored in a single register, enabling the circuit to adaptively provide different read voltage levels for retry operations without increasing hardware footprint.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If many registers are used to store read voltage codes for MLC reading, then multiple read voltages can be supported, but the number of registers and circuit complexity greatly increases

Engineering Contradiction:
Improvesupport for multiple read voltages in MLCVSAvoidnumber of registers
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent makes a single register multi-functional by using it to store different read voltage codes at different time points. The same register that stores CODE1 for the first reading is reused to store CODE2 for the second reading, and so on. This universal approach allows the circuit to support multiple read voltages for MLC without requiring separate dedicated registers for each voltage level, thereby reducing overall circuit complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the temporal parameter of code storage by sequentially storing different read voltage codes in the same register at different time points during read-retry operations. Instead of spatially distributing codes across multiple registers, the system uses temporal multiplexing where the register content changes over time, allowing the same hardware resource to serve multiple voltage requirements.

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If fixed read voltage codes are stored in registers, then read voltages can be generated, but flexible adjustment of read voltage levels becomes difficult

Engineering Contradiction:
Improveread voltage generationVSAvoidadjustment of read voltage level
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent transforms the static read voltage code storage into a dynamic system using a counter circuit. The counter automatically generates sequential code values that are stored in the register, enabling the read voltage level to be automatically adjusted for each retry operation without manual intervention. This dynamic approach provides flexibility in voltage level adjustment while maintaining ease of operation through automated code generation.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9036418B2Read voltage generation circuit, memory and memory system including the same
Publication Date: 2015.05.19 MIMIRIP LLC
  • US9036418B2 patent drawing
  • US9036418B2 patent drawing
  • US9036418B2 patent drawing

AI summary

A read voltage generation circuit includes a register unit configured to store an initial read voltage code, a counter circuit configured to change a read voltage code in every read-retry operation, wherein an initial value of the read voltage code is the initial read voltage code; and a voltage generation circuit configured to generate a read voltage corresponding to a read voltage code produced by the counter circuit.