Real-Time Connectivity Short Detection in Electronic Circuit Design
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current electronic design automation (EDA) tools lack real-time feedback for potential shorts in electronic circuit designs, leading to accidental mistakes and productivity/data integrity losses, especially in complex and dense circuits with multiple simultaneous connections.
Innovation Solution
A computer-implemented method that displays feedback at a graphical user interface by determining an influence metric using an optimized connectivity rules definition on a circuit connectivity graph, providing notifications for valid or invalid placements before finalizing the subcircuit's position, addressing both direct and indirect connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If design rules check (DRC) process is used to identify design issues, then connectivity errors can be detected, but the feedback is provided only after erroneous connections have been made, leading to productivity loss and design integrity issues
Solution Approach 1:
The system performs connectivity analysis on the fly during circuit design operations, before the designer finalizes the placement. The influence metric is calculated in real-time as the designer moves components, providing preliminary detection of potential shorts before they become actual design errors, thus preventing productivity loss while maintaining design integrity
Solution Approach 2:
The system provides continuous real-time feedback to the designer about potential connectivity issues as they move components. The feedback includes visual indicators showing which placements would create shorts, allowing the designer to adjust before finalizing the design, thereby improving both productivity (by preventing errors) and design integrity
2Reliability
If real-time connectivity analysis is performed during circuit design operations, then immediate feedback on potential shorts is provided, but the computational complexity increases significantly for complex and dense circuits
Solution Approach 1:
The system segments the connectivity analysis by focusing only on the local region around the moved component and its direct/indirect connections, rather than analyzing the entire circuit. The influence metric calculation is localized to affected subcircuits, reducing computational complexity from O(n²) to O(k) where k is the number of directly/indirectly connected components
Solution Approach 2:
The system dynamically adjusts the analysis scope based on the circuit density and connection type. For sparse circuits, full connectivity is analyzed; for dense circuits, the analysis is limited to directly and indirectly connected components only. This dynamic approach maintains real-time performance across varying circuit complexities
3Measurement precision
If direct and indirect connections are both analyzed for potential shorts, then comprehensive connectivity detection is achieved, but the time required for analysis increases
Solution Approach 1:
The system pre-calculates and stores the connectivity graph structure, including all direct and indirect connections, before the design operation. When a component is moved, the system quickly queries this pre-built structure to determine affected connections, rather than performing full path-finding analysis during the operation, thus achieving comprehensive detection without excessive analysis time
Solution Approach 2:
The system performs partial connectivity analysis by focusing only on directly and indirectly connected components rather than all possible connections in the circuit. This selective approach provides sufficient detection accuracy for practical design work while significantly reducing analysis time compared to exhaustive connectivity checking
Data Source
AI summary
The present disclosure relates to a method for use with an electronic design. Embodiments may include displaying, at a graphical user interface, at least a portion of the electronic design and receiving a selection of a subcircuit at a first position of the graphical user interface. In response to a user input, embodiments may include transitioning the subcircuit from the first position to a second position of the graphical user interface and determining one or more direct and indirect connections resulting from a potential placement at the second position. Embodiments may include determining an influence metric by applying an optimized connectivity rules definition upon the potential placement at the second position and the one or more direct and indirect connections. Embodiments may also include displaying feedback at the graphical user interface based upon, at least in part, the influence metric.