Receiver Equalizer Offsets for Upper and Lower Eye Clipping

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Solution Overview

Problem

Existing receiver circuits struggle to appropriately amplify and restore data from signals with Upper Eye and Lower Eye due to amplitude clipping, leading to inaccurate data determination.

Innovation Solution

The proposed receiver circuit employs offset voltage application and amplification circuits to adjust signal centers to 0 V, ensuring proper amplification of Upper Eye, Center Eye, and Lower Eye, and includes a sense amplifier with interpolation processing to generate a Center Eye signal, reducing the number of amplification circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a single amplification circuit is used to amplify the received signal, then the circuit area is reduced, but amplitude clipping occurs for Upper Eye and Lower Eye signals leading to inaccurate data determination

Engineering Contradiction:
Improvecircuit areaVSAvoiddata determination accuracy
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent divides the single amplification function into three separate amplification circuits (first, second, and third amplification circuits), each dedicated to amplifying specific eye signals (Upper Eye, Center Eye, and Lower Eye respectively). This segmentation allows each circuit to be optimized for its specific signal range, preventing amplitude clipping while maintaining accurate data determination for all eye signals.

Inventive Principle:
Principle #1Segmentation

2Reliability

If three separate amplification circuits are used for Upper Eye, Center Eye, and Lower Eye, then data determination accuracy is improved, but the circuit area increases

Engineering Contradiction:
Improvedata determination accuracyVSAvoidcircuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies local quality by configuring each amplification circuit with specific offset voltage application characteristics tailored to its designated eye signal. The first amplification circuit handles Upper Eye signals with appropriate offset, the second handles Center Eye signals, and the third handles Lower Eye signals. This localized optimization ensures each circuit operates at peak efficiency for its specific function, achieving high data determination accuracy without requiring excessive circuit area compared to a single general-purpose amplifier.

Inventive Principle:
Principle #3Local quality

3Reliability

If offset voltage is applied to adjust signal centers to 0 V, then proper amplification is achieved, but additional offset circuits are required increasing device complexity

Engineering Contradiction:
Improvesignal amplification accuracyVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the offset voltage application function with the amplification function by integrating offset circuits directly within each amplification circuit. The first offset circuit is combined with the first amplification circuit, the second offset circuit with the second amplification circuit, and so on. This merging eliminates the need for separate standalone offset adjustment stages, reducing overall device complexity while maintaining the necessary signal centering and amplification functionality.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12537729B2Receiver circuit and method
Publication Date: 2026.01.27 KIOXIA CORP
  • US12537729B2 patent drawing
  • US12537729B2 patent drawing
  • US12537729B2 patent drawing

AI summary

A receiver circuit includes an equalizer configured to process a received signal; a first offset circuit configured to apply a first offset voltage to the processed signal, the first offset voltage having a first polarity; a second offset circuit configured to apply a second offset voltage to the processed signal, the second offset voltage having a second polarity opposite to the first polarity; a first amplification circuit configured to amplify a first output signal provided by the first offset circuit; a second amplification circuit configured to amplify a second output signal provided by the second offset circuit; and a third amplification circuit configured to amplify the processed signal.