Receiver-Side Oversampling Circuitry for Jitter Tolerance

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Solution Overview

Problem

Conventional data communications circuitry requires oversampling at both transmitter and receiver ends to mitigate jitter, introducing complexity and unwanted components into the system.

Innovation Solution

The data communications circuitry in the receiving integrated circuit receives data at the core data rate without oversampling, oversamples the incoming data, and uses downsampling circuitry with a downsampling algorithm to remove redundant bits and output data at the core data rate, enhancing jitter tolerance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If oversampling circuitry is used at both transmitting and receiving ends to reduce jitter impact, then jitter tolerance is improved, but device complexity increases

Engineering Contradiction:
Improvejitter toleranceVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts the oversampling function from the transmitter and relocates it only to the receiver side. The transmitter sends data at the core data rate without oversampling, while the receiver performs oversampling and downsampling to achieve jitter tolerance. This extraction resolves the contradiction by maintaining reliability improvement while eliminating the complexity increase at the transmitter.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention merges the oversampling and downsampling functions into a single integrated downsampling circuitry at the receiver. This circuitry combines multiple stages of sampling and filtering operations into one unified block, reducing the overall system complexity while maintaining the jitter tolerance benefits.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If oversampling is implemented at the transmitter, then data transmission reliability under jitter conditions is improved, but the number of components increases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidnumber of components
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The oversampling function is extracted from the transmitter components and relocated to the receiver. This eliminates the need for separate oversampling circuitry at the transmitter, reducing the total number of components in the system while maintaining data transmission reliability through receiver-side processing.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If conventional oversampling schemes are used to reduce sensitivity to jitter, then jitter tolerance is improved, but unwanted complexity is introduced into the system

Engineering Contradiction:
Improvejitter toleranceVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention inverts the conventional approach by performing oversampling at the receiver rather than the transmitter. This inversion allows the system to achieve jitter tolerance while avoiding the complexity of having oversampling circuitry at both ends, as the transmitter simply sends data at the core data rate without additional processing.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS8295421B1Data communications circuitry with high jitter tolerance
Publication Date: 2012.10.23 ALTERA CORP
  • US8295421B1 patent drawing
  • US8295421B1 patent drawing
  • US8295421B1 patent drawing

AI summary

Integrated circuits with data communications circuitry are provided. The data communications circuitry on an integrated circuit may receive data that was transmitted from another integrated circuit at a data rate. The data communications circuitry may include oversampling circuitry that oversamples the data to produce an oversampled version of the data at an oversampled data rate. Downsampling circuitry in the data communications circuitry may be used to downsample the oversampled data. The downsampling circuitry may include cascaded groups of registers that store the oversampled data. The outputs of each of the groups of registers may be combined to form a combined parallel output. A downsampling control circuit may have a multiplexer that selects a subset of the signals from the combined parallel output in response to control signals from a transition detector. A middle bit detector may extract a bit value from the selected subset to use as the downsampled output.