Receiver Threshold Control for POD Memory Signaling
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Solution Overview
Problem
As data transmission/receiving speeds increase, signal integrity is degraded due to duty ratio distortion, particularly in memory devices using pseudo open drain (POD) termination, which reduces signal swing and increases common voltage, making it challenging to maintain signal fidelity and reduce power consumption.
Innovation Solution
A semiconductor device and signaling method that utilize a constant reference voltage and a termination circuit with variable resistance, allowing the logic threshold voltage of the receiver to be adjusted based on the termination operating mode, enabling seamless switching between non-termination, pseudo open drain, and VSSQ termination modes without altering the reference voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pseudo open drain (POD) termination is used to improve signal fidelity at high speeds, then signal integrity is improved, but power consumption increases and signal swing is reduced
Solution Approach 1:
The patent implements dynamic switching between POD termination mode and non-POD termination mode based on operating conditions. The termination control signal dynamically adjusts the termination circuit configuration, allowing the system to use POD termination only when signal fidelity is critical (high-speed operation) and switch to non-POD mode when power consumption can be reduced, thus resolving the contradiction between signal integrity and power consumption
Solution Approach 2:
The patent changes the termination resistance parameter dynamically by switching between different termination modes. In POD mode, the termination resistance is configured to improve signal fidelity, while in non-POD mode, the termination resistance is adjusted to reduce power consumption. This parameter change allows the system to optimize performance based on operational requirements
2Reliability
If termination circuit is enabled to maintain signal integrity, then signal fidelity is improved, but device complexity increases
Solution Approach 1:
The termination circuit is designed to perform multiple functions: it can operate in POD termination mode for high-speed signal integrity, in non-POD termination mode for power saving, and support intermediate states. This multi-functionality allows a single circuit design to handle various operational requirements without requiring separate dedicated circuits for each mode, thus managing complexity while maintaining flexibility
3Reliability
If logic threshold voltage is adjusted according to termination mode, then signal integrity is maintained across different modes, but control complexity increases
Solution Approach 1:
The patent implements feedback control where the termination control signal that switches the termination mode also controls the logic threshold voltage adjustment. The receiver monitors the input signal characteristics and adjusts its logic threshold voltage based on the active termination mode, ensuring optimal signal interpretation in each mode. This feedback mechanism maintains signal integrity across different termination configurations
4Device complexity
If constant reference voltage is used regardless of termination mode, then circuit simplicity is maintained, but signal interpretation accuracy decreases under different termination conditions
Solution Approach 1:
While the reference voltage itself remains constant, the patent dynamically adjusts the logic threshold voltage of the receiver based on the termination mode. This dynamic adjustment of the threshold, rather than changing the reference voltage, maintains circuit simplicity while improving signal interpretation accuracy for different termination conditions
Data Source
AI summary
A semiconductor device includes a receiver configured to receive a reference voltage via a first input terminal, receive an input signal via a second input terminal, and generate an output signal by comparing the reference voltage to the input signal with each other. A termination circuit associated with the input signal terminal may be adjusted and a logic threshold voltage may be adjusted to accommodate the adjustment in the termination circuit.