Recessed-Gate LDMOS Structure for Breakdown and Current Tradeoffs
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Solution Overview
Problem
Conventional laterally-diffused metal-oxide semiconductor (LDMOS) devices face limitations in achieving high performance and high drain-to-source breakdown voltage, particularly in RF power amplifiers, due to the constraints of their doping profiles and isolation structures.
Innovation Solution
The integration of a gate structure recessed within a shallow trench isolation structure, utilizing a gate dielectric material and gate electrode extending within the trench, enhances device performance by increasing the surface area and proximity to the drift region, allowing for higher current handling with lower breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional LDMOS devices use standard isolation structures and doping profiles, then manufacturing is simpler, but device performance and breakdown voltage are limited
Solution Approach 1:
The gate structure is nested within the shallow trench isolation structure, with the gate electrode positioned inside the trench. This nesting configuration allows the gate to extend into the isolation region, increasing the effective gate area and improving electric field control without requiring separate complex isolation structures, thereby resolving the contradiction between improved breakdown voltage and structural complexity
Solution Approach 2:
The gate structure extends in the vertical dimension by penetrating into the shallow trench isolation region. This dimensional extension increases the gate surface area and improves control over the drift region without increasing lateral footprint, enabling higher breakdown voltage while maintaining compact device geometry
2Power
If LDMOS devices are designed for high breakdown voltage, then current handling capability is reduced, but if designed for high current, then breakdown voltage decreases
Solution Approach 1:
The shallow trench isolation structure provides localized electric field control in the drift region, with the gate electrode positioned to create non-uniform doping profiles and electric field distribution. This local quality enhancement allows high current handling in active regions while maintaining high breakdown voltage through improved field control in isolation regions
Solution Approach 2:
The invention changes the geometric parameters of the gate structure by extending it into the shallow trench isolation region, increasing the effective gate area and controlling the doping profile in the drift region. This parameter modification enables simultaneous achievement of high current handling capability and high breakdown voltage by optimizing the electric field distribution
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to laterally-diffused metal-oxide semiconductors and methods of manufacture. The structure includes: a drift region within a semiconductor substrate; a shallow trench isolation structure extending within the drift region; and a gate structure over the semiconductor substrate and extending within the shallow trench isolation structure.