Recessed Interposer Semiconductor Package for Warpage and Heat Dissipation
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Solution Overview
Problem
Existing semiconductor packages face challenges in high functionality, high-speed, and miniaturization, particularly in preventing warpage between upper and lower packages, which is not effectively addressed by current package-in-package or package-on-package structures.
Innovation Solution
A semiconductor package design that includes a passive element disposed between an interposer and a semiconductor chip, with a recessed structure and a mold layer covering the chip and element, enhancing electrical connectivity and reducing warpage through a multi-stage recess and integrated mold layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple semiconductor chips are connected using a conventional package structure, then electrical connectivity between chips is achieved, but warpage occurs and heat dissipation is insufficient
Solution Approach 1:
An interposer is introduced as an intermediary component between the semiconductor chip and the package substrate. The interposer includes a recess that accommodates a passive element, creating a stepped configuration. This intermediary structure provides stable electrical connectivity while the recess design helps distribute mechanical stress, preventing warpage of the overall package assembly.
2Ease of manufacture
If a simple package structure is used, then manufacturing is easier, but heat dissipation from semiconductor chips is insufficient
Solution Approach 1:
The interposer incorporates a recess containing a passive element, creating a three-dimensional stepped structure with increased surface area. This design enhances heat dissipation capacity without significantly complicating the manufacturing process, as the recess can be formed using standard semiconductor fabrication techniques such as etching.
3Volume of moving object
If chips are closely packed to reduce package size, then miniaturization is achieved, but heat dissipation becomes insufficient
Solution Approach 1:
The interposer introduces a vertical dimension with its recess structure, creating a stepped configuration that accommodates passive elements. This three-dimensional arrangement allows for improved heat dissipation pathways without increasing the horizontal footprint of the package, thereby maintaining miniaturization while enhancing thermal management.
Data Source
AI summary
A semiconductor package includes a wiring structure that includes a first insulating layer and a first conductive pattern inside the first insulating layer, a first semiconductor chip disposed on the wiring structure, an interposer that includes a second insulating layer, a second conductive pattern inside the second insulating layer, and a recess that includes a first sidewall formed on a first surface of the interposer that faces the first semiconductor chip and a first bottom surface connected with the first sidewall, where the recess exposes at least a portion of the second insulating layer, a first element bonded to the interposer and that faces the first semiconductor chip inside the recess, and a mold layer that covers the first semiconductor chip and the first element.