Recessed Topside Contact for Semiconductor Substrate
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Solution Overview
Problem
Conventional techniques for forming a topside contact to a semiconductor substrate face challenges such as high thermal budget, complex processes, and difficulty in achieving low resistance contacts, particularly in vertically conducting power devices.
Innovation Solution
A vertically conducting semiconductor device is created with an epitaxial layer extending over the topside surface of the substrate, forming a recessed region, and a conductive interconnect layer is formed within this region to provide a low resistance topside contact, while maintaining a thinner substrate and backside interconnect for improved heat dissipation and reduced manufacturing complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a heavily doped diffused region is used to form a topside contact, then electrical contact is achieved, but thermal budget increases and lateral out-diffusion occurs
Solution Approach 1:
The patent extracts the contact formation process from the bulk substrate and relocates it to the recessed peripheral region. By forming the contact in the recessed area rather than through the main epitaxial layer, the need for high-temperature drive-in diffusion is eliminated, thus reducing thermal budget while achieving reliable electrical contact.
Solution Approach 2:
The recessed region is formed beforehand in the epitaxial layer, creating a pre-prepared contact area that exposes the substrate. This preliminary structural preparation allows subsequent contact formation without requiring high-temperature diffusion processes, as the contact path is already established.
2Reliability
If a deep trench is formed and filled with conductive material, then topside contact is achieved, but manufacturing complexity increases
Solution Approach 1:
The contact formation is extracted from the complex trench-filling process and simplified to a direct deposition into a recessed region. The recessed area provides natural contact access without requiring deep trench formation or complex filling operations, thereby reducing manufacturing complexity.
Solution Approach 2:
Instead of forming a contact through the bulk substrate (conventional approach), the patent inverts the approach by creating a recessed region that exposes the substrate periphery. This inverted geometry allows direct contact formation without the need for deep trenching or complex material filling.
3Reliability
If polysilicon is used to fill a trench, then contact formation is attempted, but achieving highly doped low resistivity contact becomes difficult
Solution Approach 1:
The contact formation is extracted from the polysilicon trench-filling approach and relocated to a recessed region where direct substrate contact is achieved. This eliminates the need for polysilicon deposition and subsequent high-temperature doping processes, making it easier to achieve low resistivity contacts.
Solution Approach 2:
The patent replaces the complex polysilicon-based contact structure with a simpler direct metal contact to the substrate in the recessed region. This disposable-like simplification eliminates the need for complex polysilicon processing while achieving the desired low resistance contact.
Data Source
AI summary
A process for forming a vertically conducting semiconductor device includes providing a semiconductor substrate having a topside surface and a backside surface. The semiconductor substrate serves as a terminal of the vertically conducting device for biasing the vertically conducting device during operation. The process also includes forming an epitaxial layer extending over the topside surface of the semiconductor substrate but terminating prior to reaching an edge of the semiconductor substrate so as to form a recessed region along a periphery of the semiconductor substrate. The method also includes forming an interconnect layer extending into the recessed region but terminating prior to reaching an edge of the semiconductor substrate. The interconnect layer electrically contacts the topside surface of the semiconductor substrate in the recessed region to thereby provide a topside contact to the semiconductor substrate.