Recessed Windows for Electronic Chip Integration on Photonic Chips
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Solution Overview
Problem
The integration of electronic integrated circuits onto photonic integrated circuits is challenging due to differences in material systems and technologies, leading to height mismatch and complications in electrical and thermal management, which are costly and time-consuming, especially as module bandwidth increases and footprint shrinks.
Innovation Solution
Preparation of recessed windows of controlled depths on photonic integrated circuit chips to accommodate electronic integrated circuits, allowing for precise height matching and electrical grounding, with options for upside-down or upside-up positioning and wire bond connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If electronic integrated circuits are integrated onto photonic integrated circuits using prior art techniques with shims of varying thicknesses, then height mismatch is addressed, but the integration process becomes costly and time-consuming
Solution Approach 1:
Recessed windows are prepared in advance on the photonic integrated circuit chip during the fabrication process, before the electronic integrated circuit is mounted. This preliminary preparation eliminates the need for time-consuming post-fabrication height adjustment using shims, directly resolving the contradiction between manufacturing precision and integration time
2Manufacturing precision
If electronic integrated circuits are integrated onto photonic integrated circuits using prior art techniques with shims of varying thicknesses, then height mismatch is addressed, but integration costs increase
Solution Approach 1:
The fabrication process for the photonic integrated circuit is merged with the preparation of recessed windows, combining multiple functions into a single integrated process. This eliminates the need for separate shim fabrication and assembly steps, reducing integration costs while maintaining height matching precision
3Productivity
If electronic and photonic chips are positioned closer together for high-speed applications, then bandwidth increases, but electrical and thermal management becomes more difficult
Solution Approach 1:
The recessed window structure creates localized regions with different thermal and electrical properties. The recessed areas allow for optimized local thermal management and electrical grounding configurations, enabling closer chip placement for high bandwidth while managing the increased complexity of thermal and electrical control
4Productivity
If electronic and photonic chips are positioned closer together for high-speed applications, then bandwidth increases, but packaging time increases
Solution Approach 1:
The recessed windows are prepared in advance during photonic chip fabrication, creating pre-configured mounting locations. This preliminary action enables faster packaging of electronic chips in the required close proximity positions, allowing high bandwidth performance without increasing packaging time
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Facilitates efficient and cost-effective integration of electronic chips close to photonic circuits, reducing wiring length and addressing electrical and thermal requirements, thereby simplifying the integration process and reducing packaging time and costs.
Implementation Method 1
using micro-fabrication techniques such as plasma-based dry etch
Implementation Method 2
using micro-fabrication techniques such as plasma-based dry etch and wet-chemical etch
Data Source
AI summary
Methods, structures, apparatus, devices, and materials to facilitate the integration of electronic integrated circuits (chips) including drivers, amplifiers, microcontrollers, etc., onto/into photonic integrated circuits (chips) using recessed windows exhibiting controlled depths onto/into the photonic chip. The electronic chips are positioned into the recessed windows and electrical connections between the electronic chips and the photonic chip are achieved by flip-chip techniques with predefined traces at a bottom of the recessed windows or direct wire bonding. Advantageously, this integration may be performed on a wafer level for large-volume productions.