Reconfigurable DSC Accelerator Throughput Matching
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Solution Overview
Problem
Conventional depth-wise separable convolution (DSC) accelerators face challenges in throughput matching between depth-wise convolution (DWC) and point-wise convolution (PWC) engines, leading to unbalanced inter-layer pipelines and reduced overall performance due to differences in performance characteristics, such as being memory-bound for DWC layers and compute-bound for PWC layers.
Innovation Solution
A reconfigurable architecture that selectively activates processing elements (PEs) in DWC and PWC engines based on throughput differences, allowing for adaptive configuration to match throughput between engines and optimize resource use, thereby improving hardware performance and reducing resource consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional DSC accelerator uses fixed configuration for DWC and PWC engines, then the hardware structure is simple, but the throughput matching between engines is poor leading to unbalanced pipelines
Solution Approach 1:
The patent implements dynamic reconfiguration of the DSC accelerator by enabling selective activation of processing elements (PEs) in both DWC and PWC engines at runtime. The system determines throughput differences between engines and dynamically adjusts the number of active PEs to balance the pipeline, transforming a static hardware configuration into an adaptive system that optimizes throughput matching for different CNN models and layers.
Solution Approach 2:
The system changes operational parameters by adjusting the number of active processing elements based on throughput measurements. By modifying the activation state of PEs (from fully active to selectively activated), the system alters the effective computational capacity of each engine to achieve throughput balance, without changing the physical hardware structure.
2Power
If all processing elements are activated in both DWC and PWC engines, then the computational power is maximized, but the energy consumption increases
Solution Approach 1:
The patent applies partial action by selectively activating only the necessary number of processing elements required to achieve throughput balance, rather than activating all PEs. The system determines the minimum required computational power for each engine based on throughput differences and activates corresponding PEs, reducing energy consumption while maintaining sufficient computational capability.
Solution Approach 2:
The system dynamically changes the activation parameter of processing elements based on runtime throughput measurements. By adjusting the number of active PEs according to actual workload requirements and throughput matching needs, the system optimizes the balance between computational power and energy consumption for different CNN models and execution scenarios.
Data Source
AI summary
A method of operating a depth-wise separable convolutional (DSC) network on a DSC accelerator includes determining a difference between a first throughput associated with a depth-wise convolution (DWC) engine of the DSC accelerator and a second throughput associated with a point-wise convolution (PWC) engine of the DSC accelerator. The method also includes selectively activating, for each layer of the DSC network, each first processing elements (PEs) in one or more of a first set of columns of first PEs associated with the DWC engine and/or each second PE in one or more of a second set of columns associated with the PWC engine based on the difference between the first throughput and the second throughput. The method further includes processing, for each layer of the DSC network, an input via the DSC accelerator based on selectively activating each first PE and/or each second PE.