Reconfigurable IC Memory Sharing for Flexible Switch Control
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Solution Overview
Problem
Reconfigurable circuits face challenges in area efficiency and flexibility due to redundancy in functional blocks, configuration data memory, and programmable switches, leading to increased circuit area and performance degradation when trying to balance interconnection resource attributes and accommodate various applications.
Innovation Solution
A semiconductor integrated circuit design that uses a common configuration data memory to control multiple programmable switches, reducing the number of configuration data memories and optimizing interconnection resource usage through memory sharing and selective validation/invalidation of switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple separate configuration data memories are used to control different programmable switches, then each switch can be independently configured, but the circuit area increases due to redundancy
Solution Approach 1:
The patent combines multiple separate configuration data memories into a single shared configuration data memory that serves multiple programmable switches. This memory sharing approach eliminates redundant memory structures while maintaining the ability to independently configure each switch through selective validation and invalidation mechanisms.
Solution Approach 2:
The single configuration data memory is designed to serve multiple programmable switches simultaneously. By implementing validation and invalidation control mechanisms, the same memory resource can be selectively assigned to different switches based on operational needs, making the memory universal rather than dedicated to a single switch.
2Adaptability or versatility
If multiple configuration data memories are provided for different programmable switches, then configuration flexibility is improved, but configuration data memory overhead increases
Solution Approach 1:
The patent merges multiple configuration data memories into one shared memory structure, eliminating the overhead of maintaining separate memory instances. The configuration flexibility is preserved through control logic that validates or invalidates specific memory contents for different switches rather than requiring separate physical memories.
Solution Approach 2:
Instead of creating multiple physical copies of configuration data memories, the patent uses a single memory instance with virtualization through validation/invalidation control. This allows the same physical memory to be logically copied or assigned to different switches as needed, reducing actual hardware overhead while maintaining functional equivalence.
3Productivity
If interconnection resources are optimized for specific attributes, then processing efficiency improves, but adaptability to various applications decreases
Solution Approach 1:
The patent implements dynamic interconnection resources that can change their attributes based on operational requirements. Rather than being fixed for specific functions, the interconnection resources can be reconfigured through the programmable switches to optimize for different data widths, transmission directions, or connection patterns depending on the current application being executed.
Solution Approach 2:
The interconnection resources support parameter changes such as data width, transmission mode, and connection topology through programmable control. This allows the same physical interconnection structure to be optimized for different processing requirements by changing its operational parameters rather than requiring dedicated hardware for each application type.
Data Source
AI summary
A semiconductor integrated circuit includes: a plurality of the functional blocks; a plurality of configuration data memories in which a plurality of configuration data are stored; and a plurality of programmable switches configured to control connection between said plurality of functional blocks based on one of the plurality of configuration data which is stored in a common one of said plurality of configuration data memories.


