Reconfigurable Interface Buffer Circuit for Variable On-Chip I/O

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Solution Overview

Problem

The integration of programmable logic devices with dedicated devices on a single chip faces challenges due to the need for redesigning interface circuits to accommodate different I/O demands, leading to increased costs and delays, while existing solutions fail to efficiently address the variability in interface requirements.

Innovation Solution

The implementation of a mask programmable uni-directional interface buffer circuit and a hardware configurable bi-directional interface buffer circuit, which can be easily modified by re-routing conductors in a single metal layer to adapt to various dedicated devices' I/O demands, allowing for flexible and efficient interface design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a programmable logic device is placed on the same chip as a dedicated device, then on/off-chip delays and board area are reduced, but the interface circuit requires expensive and time-consuming redesign depending on I/O interface demands

Engineering Contradiction:
Improvesignal transmission speedVSAvoidinterface circuit redesign complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The interface buffer circuit is designed with reconfigurable conductors that can be routed in different directions within a single metal layer, allowing the same physical circuit to serve multiple dedicated devices with different I/O interface demands without requiring redesign

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The interface buffer circuit incorporates configurable elements that allow dynamic re-routing of conductors in the single metal layer to accommodate different I/O interface configurations, enabling adaptability without physical redesign

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If separate dedicated devices are used off-chip, then interface redesign flexibility is maintained, but on/off-chip delays and board area increase

Engineering Contradiction:
Improveinterface redesign flexibilityVSAvoidboard area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The dedicated device and programmable logic device are integrated on the same chip with a reconfigurable interface buffer circuit that provides the necessary flexibility, eliminating the need for separate off-chip devices while maintaining adaptability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single metal layer routing structure provides universal interface support for different dedicated device types, replacing multiple specialized off-chip interfaces with one reconfigurable on-chip interface

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8487652B2Adjustable interface buffer circuit between a programmable logic device and a dedicated device
Publication Date: 2013.07.16 QUICKLOGIC CORP
  • US8487652B2 patent drawing
  • US8487652B2 patent drawing
  • US8487652B2 patent drawing

AI summary

An integrated circuit includes a programmable logic device, a dedicated device, and an interface circuit between the two. The interface circuit can be easily modified to accommodate the different interface I/O demands of various dedicated devices that may be embedded into the integrated circuit. In one embodiment, the interface circuit may be implemented using a plurality of mask programmable uni-directional interface buffer circuits. The direction of any desired number of the interface buffer circuits can be reversed based on the needs of a desired dedicated device by re-routing the conductors in the interface buffer circuits in a single metal layer of the integrated circuit. In another embodiment, the interface circuit may be implemented using a hardware configurable bi-directional interface buffer circuit.