Reconfigurable Logic Mapping for Real-Time Resource Allocation

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Solution Overview

Problem

Conventional data processing systems, such as system LSIs, face challenges in achieving real-time performance and efficient resource allocation due to fixed hardware configurations, leading to increased costs, power consumption, and reduced functionality, especially in applications requiring dynamic trade-offs between function and performance.

Innovation Solution

A data processing system with a dynamically reconfigurable logic circuit region that optimizes hardware resources by dynamically mapping and controlling object circuits and interface circuits based on architecture codes, allowing for flexible allocation of resources according to application requirements, thereby reducing standby resources and prioritizing urgent functions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If fixed hardware configurations are used in conventional data processing systems, then manufacturing precision and reliability are improved, but adaptability and resource allocation efficiency deteriorate

Engineering Contradiction:

Improvehardware configuration stabilityVSAvoiddynamic resource allocation

Core Design Contradiction:

Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamically reconfigurable logic circuit region that can change its hardware configuration at runtime based on application requirements. The system divides the logic circuit region into multiple banks and uses a configuration management unit to dynamically allocate and reconfigure these banks, enabling the hardware to adapt to different computational tasks while maintaining manufacturing precision through controlled reconfiguration processes.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The logic circuit region is segmented into multiple configurable banks that can be independently allocated and reconfigured. This segmentation allows the system to divide hardware resources into discrete units that can be dynamically assigned to different applications, resolving the contradiction between fixed configuration stability and dynamic adaptability.

Inventive Principle:

Principle #1Segmentation

2Adaptability or versatility

If more hardware resources are allocated to handle diverse applications, then adaptability is improved, but device complexity and power consumption increase

Engineering Contradiction:

Improveapplication support capabilityVSAvoidhardware resource quantity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent creates a universal hardware architecture where a single reconfigurable logic circuit region can serve multiple applications through dynamic configuration. The configuration management unit enables the same physical hardware resources to be reused across different applications, eliminating the need for dedicated hardware for each application and reducing overall device complexity while maintaining high adaptability.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If hardware resources are increased to maintain fixed functionality, then reliability is improved, but loss of substance and cost increase

Engineering Contradiction:

Improveprocessing performanceVSAvoidstandby hardware resources

Core Design Contradiction:

ReliabilityVSLoss of substance

Solution Approach 1:

The system implements dynamic reconfiguration that allows hardware resources to be discarded from inactive applications and recovered for use in active applications. The configuration management unit tracks resource usage and reallocates standby resources to where they are needed, ensuring reliable processing performance while minimizing waste of hardware resources.

Inventive Principle:

Principle #34Discarding and recovering

4Ease of manufacture

If conventional fixed hardware modules are used, then ease of manufacture is improved, but productivity and processing speed deteriorate

Engineering Contradiction:

Improvehardware module standardizationVSAvoiddata processing speed

Core Design Contradiction:

Ease of manufactureVSProductivity

Solution Approach 1:

The patent introduces dynamic reconfiguration capability that allows the hardware to optimize its structure for different processing tasks. While maintaining standardized manufacturing processes for the base architecture, the system can dynamically reconfigure logic circuits to optimize processing speed for specific applications, resolving the contradiction between manufacturing ease and processing productivity.

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS8106679B2Data processing system

Publication Date: 2012.01.31 TOKYO KEIKI

AI summary

The present invention provides an architecture code 20 including object circuit information 23 for mapping an object circuit that is at least part of a circuit for executing an application onto part of a logic circuit where circuits can be dynamically reconfigured, interface circuit information 24 for mapping an interface circuit in contact with the object circuit onto the logic circuit, and boundary condition 26 to be realized in the interface circuit. A data processing system in the present invention includes a load unit obtaining an architecture code 20, a mapping unit for mapping the object circuit and the interface circuit in contact with the object circuit onto the logic circuit region according to the object circuit information 23 and the interface circuit information 24 of the architecture code, and a behavior control unit for controlling the interface circuit according to the boundary condition 26 of the architecture code.