Reconfigurable SIMD Units Exchange Intermediate Results

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Solution Overview

Problem

Contemporary chip/core designs face challenges in balancing high precision and low precision arithmetic requirements, leading to inefficiencies in processing emerging workloads like cognitive computing, as they struggle to strike a balance between a few high precision units and a sea of low precision units, resulting in performance penalties and software overhead.

Innovation Solution

A system comprising reconfigurable SIMD units that exchange intermediate results to compute a combined high precision complex arithmetic operation, allowing for efficient execution of both high and low precision calculations by combining partial results from multiple units, thereby enabling high precision operations while minimizing wiring overhead and performance delays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a few high precision units are used, then high precision computation is improved, but low precision throughput deteriorates

Engineering Contradiction:
Improvehigh precision computationVSAvoidlow precision throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent segments the arithmetic units into multiple reconfigurable units, each capable of performing both high and low precision operations. This segmentation allows the system to distribute computational tasks across multiple units, maintaining high precision capability while improving overall throughput through parallel processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic reconfiguration of the arithmetic units, allowing them to switch between high precision and low precision modes based on workload requirements. This dynamic capability enables the system to optimize performance for different computational tasks, resolving the contradiction between precision and throughput.

Inventive Principle:
Principle #15Dynamics

2Productivity

If a sea of low precision units is used, then low precision throughput is improved, but high precision computation deteriorates due to software overhead

Engineering Contradiction:
Improvelow precision throughputVSAvoidsoftware overhead for high precision computation
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent designs universal reconfigurable arithmetic units that can perform both high precision and low precision operations. This multi-functionality eliminates the need for separate dedicated units, reducing software overhead while maintaining the ability to execute both precision levels efficiently.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent changes the operational parameters of the arithmetic units dynamically, allowing them to switch between different precision modes. This parameter change approach simplifies the system architecture compared to having separate units, while maintaining high precision computation capability through hardware-level configuration changes.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If reconfigurable units exchange intermediate results, then high precision complex arithmetic is improved, but wiring overhead increases

Engineering Contradiction:
Improvehigh precision complex arithmeticVSAvoidwiring overhead
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple reconfigurable units into a unified computational structure where intermediate results are exchanged through integrated pathways. This merging approach reduces wiring overhead by eliminating the need for separate communication channels between units, while maintaining the capability to perform high precision complex arithmetic operations.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10275391B2Combining of several execution units to compute a single wide scalar result
Publication Date: 2019.04.30 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10275391B2 patent drawing
  • US10275391B2 patent drawing
  • US10275391B2 patent drawing

AI summary

A circuit includes reconfigurable units that are reconfigurable to compute a combined result. A first intermediate result of a first reconfigurable unit of the reconfigurable units is exchanged with a second intermediate result of the second reconfigurable unit of the reconfigurable units. The first reconfigurable unit computes a first portion of the combined result utilizing the second intermediate result. The second reconfigurable unit of the reconfigurable units computes a second portion of the combined result utilizing the first intermediate result.