Reconstituted Wafer Thermal Stress Reduction
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Solution Overview
Problem
Wafer-level packaging faces challenges due to limitations in the number of contacts and contact area, leading to increased production costs and poor reliability, primarily caused by thermal expansion coefficient differences between silicon chips and mold compounds, resulting in stress, bowing, and warpage issues.
Innovation Solution
A reusable frame is used to form a reconstituted wafer with a reduced volume fraction of mold compound, matching the thermal expansion coefficient of the chips, thereby reducing residual stress and preventing bowing and warpage, and allowing for improved contact formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional wafer-level packaging is used with standard mold compound, then the packaging process can be completed, but thermal expansion coefficient differences cause stress, bowing, and warpage issues leading to poor reliability
Solution Approach 1:
The patent changes the thermal expansion coefficient parameter of the mold compound by using a frame with coefficient matching the silicon chip (2.6-7.2 ppm/°C) instead of traditional mold compound (11-18 ppm/°C). This parameter change eliminates thermal stress and warpage issues while maintaining packaging reliability.
Solution Approach 2:
The frame acts as an intermediary material between the silicon chip and the actual mold compound. It provides a thermal expansion buffer that matches the chip, preventing stress transmission while still allowing the packaging process to proceed with traditional mold compounds.
2Ease of manufacture
If the volume fraction of mold compound is increased to fill gaps between chips, then complete packaging is achieved, but stress and warpage issues worsen due to thermal expansion differences
Solution Approach 1:
The patent segments the packaging structure into three distinct parts: the frame (providing thermal expansion matching), the silicon chips (active devices), and the mold compound (filling material). This segmentation allows each component to perform its specific function without compromising the others, enabling complete packaging with reduced stress.
Solution Approach 2:
By changing the thermal expansion coefficient parameter of the primary structural component (frame) to match the chip, the patent enables increased mold compound volume fraction without proportionally increasing stress, as the frame absorbs thermal expansion differences.
3Reliability
If contact area is increased to improve electrical connections, then electrical coupling improves, but the number of available contacts decreases due to wafer level constraints
Solution Approach 1:
The frame structure provides additional dimensional space around the chips, allowing contact areas to be optimized without constraining the number of contacts. The frame's presence creates unused space that can accommodate larger contact areas while maintaining high contact density through the wafer-level array configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces stress and warpage in reconstituted wafers, enhancing handling, alignment, and electrical coupling, leading to improved product yield and reliability while maintaining cost-effectiveness.
Implementation Method 1
matching the thermal expansion coefficient of the chips, thereby reducing residual stress and preventing bowing and warpage
Data Source
AI summary
Method and apparatus for semiconductor device fabrication using a reconstituted wafer is described. In one embodiment, diced semiconductor chips are placed within openings on a frame. A reconstituted wafer is formed by filling a mold compound into the openings. The mold compound is formed around the chips. Finished dies are formed within the reconstituted wafer. The finished dies are separated from the frame.