Reconstituted Wafer Assembly With Optical Waveguides

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Solution Overview

Problem

Integrated circuit devices face challenges with latency, bandwidth density, and thermal control due to limitations in monolithic integration and wafer stacking, which existing assembly-based approaches do not adequately address.

Innovation Solution

An integrated circuit device assembly is fabricated using a reconstituted wafer attached to a base substrate that includes a fluid cooling network and optical waveguide network, with electrical interconnects for thermal management and high-bandwidth signaling, enabling efficient heat removal and data transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If monolithic integration is used to increase core counts and functionality, then device capability is improved, but parasitic capacitance increases causing lower performance

Engineering Contradiction:
Improvecore counts and functionalityVSAvoidperformance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent divides the integrated circuit into multiple separate dies that are stacked vertically rather than integrating all functions into a single monolithic wafer. This segmentation reduces parasitic capacitance while maintaining high core counts and functionality across multiple discrete components.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar (2D) monolithic integration to three-dimensional (3D) stacking architecture. By arranging dies vertically in multiple layers, the system achieves higher functionality and core counts without the parasitic capacitance penalties of lateral integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If wafer stacking is used to achieve heterogeneity between memory and computing devices, then device capability is improved, but latency and bandwidth density issues remain

Engineering Contradiction:
ImproveheterogeneityVSAvoidlatency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent introduces an interposer as an intermediary layer between stacked dies. The interposer provides high-speed electrical and optical interconnects that reduce latency and improve bandwidth density, serving as a mediator that enables efficient communication between heterogeneous memory and computing devices in the stack.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces traditional electrical interconnects with optical interconnects for certain signal paths. This substitution reduces signal propagation delay and increases bandwidth density, addressing latency issues while maintaining heterogeneity between different device types.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Ease of manufacture

If assembly-based approaches are used to form reconstituted wafers, then some integration issues are addressed, but thermal control and bandwidth density remain insufficient

Engineering Contradiction:
Improveassembly-based fabricationVSAvoidthermal control
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

The patent integrates fluid cooling channels directly into the base substrate and interposer structures. Coolant flows through these hydraulic pathways to actively remove heat from high-power regions, providing effective thermal control while maintaining the assembly-based manufacturing approach.

Inventive Principle:
Principle #29Pneumatics and hydraulics

Solution Approach 2:

The patent employs composite substrate structures combining different materials with complementary properties. The base substrate integrates thermal management materials, electrical interconnects, and optical waveguides into a multi-functional composite structure that addresses thermal control, bandwidth density, and manufacturability simultaneously.

Inventive Principle:
Principle #40Composite materials

4Volume of moving object

If device size is reduced to meet smaller package requirements, then portability is improved, but thermal management becomes more difficult

Engineering Contradiction:
Improvepackage sizeVSAvoidthermal management
Core Design Contradiction:
Volume of moving objectVSTemperature

Solution Approach 1:

The patent moves thermal management from a two-dimensional planar approach to a three-dimensional vertical architecture. Heat sinks and cooling structures are integrated into the vertical stack, allowing efficient heat removal from compact devices by utilizing the third dimension for thermal pathways.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent nests thermal management structures within the device architecture itself. Cooling channels are embedded within the substrate and interposer layers, and heat sinks are integrated into the package structure, creating a nested configuration that provides effective thermal control without increasing external package volume.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances thermal management and bandwidth density, addressing latency issues by providing effective heat removal and high-speed data transmission through the integration of fluid cooling and optical waveguide networks within the base substrate.

Implementation Method 1

a base substrate having at least one fluid cooling network... providing thermal management... efficient heat removal

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

fluid cooling network... heat removal

Methodology Applied
Scientific EffectConvection: Convection

Implementation Method 3

at least one optical waveguide network... optical signal routes... high-speed data transmission

Methodology Applied
Scientific EffectOptical waveguide: Waveguide (optics)

Data Source

PatentUS10943851B1Reconstituted wafer assembly
Publication Date: 2021.03.09 INTEL CORP
  • US10943851B1 patent drawing
  • US10943851B1 patent drawing
  • US10943851B1 patent drawing

AI summary

An integrated circuit device assembly may be formed comprising a reconstituted wafer attached to a base substrate, wherein the base substrate provides thermal management and optical signal routes. In one embodiment, the base substrate may include a plurality of electrical interconnects for electrically coupling integrated circuit devices in the reconstituted wafer. In another embodiment, a plurality of electrical interconnects for electrically coupling integrated circuit devices in the reconstituted wafer may be formed in the reconstituted wafer itself.