Recoverable Exception Handling for Post-Silicon Validation

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Solution Overview

Problem

Existing post-silicon validation systems face limitations in intentionally generating and handling exceptions due to computational complexity, often resorting to 'skip-to-next' techniques which do not fully resolve exceptions, thereby reducing the effectiveness of testing semiconductor integrated circuits.

Innovation Solution

A system and method for generating and handling recoverable exceptions in post-silicon validation testing, which includes creating exception conditions and handlers to randomly raise and resolve exceptions within test programs, allowing for deterministic or indeterministic recovery operations, thereby improving exception handling and test coverage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If intentional exception insertion is performed in post-silicon validation testing, then testing coverage is improved, but computational complexity increases beyond what can be handled with limited testing time

Engineering Contradiction:
Improvetesting coverageVSAvoidcomputational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Exception conditions and handlers are created in advance before test execution. The system pre-generates exception scenarios and prepares recovery handlers, allowing comprehensive exception testing without increasing real-time computational complexity during actual validation testing.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If 'skip-to-next' technique is used to handle exceptions, then testing can continue with limited computational overhead, but exceptions are not fully resolved reducing test effectiveness

Engineering Contradiction:
Improvetesting efficiencyVSAvoidtest effectiveness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system implements self-service exception handling where automatically generated exception handlers resolve exceptions without manual intervention. The handlers automatically correct erroneous instructions or data, allowing full exception resolution while maintaining testing efficiency and effectiveness.

Inventive Principle:
Principle #25Self-service

3Reliability

If manual exception handling is performed, then exceptions can be fully resolved, but manual work increases reducing productivity

Engineering Contradiction:
Improveexception resolution completenessVSAvoidtesting productivity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system creates copies of exception handling logic through automatically generated handlers that replicate the resolution process. Instead of manual handling, the system generates handler code that automatically resolves exceptions, maintaining completeness while eliminating manual work and increasing productivity.

Inventive Principle:
Principle #26Copying

4Ease of manufacture

If test templates are strictly followed in post-silicon validation, then testing process is simplified, but ability to handle unexpected exceptions is reduced

Engineering Contradiction:
Improvetesting process simplicityVSAvoidexception handling capability
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The system dynamically adapts test execution by injecting exceptions randomly during test runtime rather than following static templates only. This allows the simplified test template process to maintain adaptability for handling unexpected exceptions through dynamic exception injection and automatic handler execution.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11226370B1Recoverable exceptions generation and handling for post-silicon validation
Publication Date: 2022.01.18 MIPS HLDG INC
  • US11226370B1 patent drawing
  • US11226370B1 patent drawing
  • US11226370B1 patent drawing

AI summary

Embodiments relate to a system, program product, and method for random generation of recoverable errors in the generated instruction stream for post-silicon validation testing. The intentional raising and handling of exceptions in post-silicon validation exercisers randomly creates recoverable errors in a generated instruction test stream. Multiple exceptions may be raised either in a single instruction or in multiple instructions, while the present instruction is permitted to fully execute. The errors responsible for raising the exceptions are automatically repaired.