Recuperating Capacitive Load Driver With Charge Pump and DAC Steps
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Solution Overview
Problem
Existing MEMS drivers dissipate excessive power due to lack of recuperation capabilities, leading to high power consumption and battery drain, especially in high-voltage and high-frequency applications, which is unsuitable for portable devices.
Innovation Solution
A driver circuit incorporating a series-parallel charge pump with a flying capacitor and a digital-to-analog converter (DAC) that generates both coarse and fine signal steps, allowing energy recuperation and minimizing dynamic losses by charging capacitors only when a load is present.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If recuperation capabilities are not implemented in MEMS drivers, then the circuit design is simpler, but power consumption increases significantly due to complete energy dissipation
Solution Approach 1:
The patent implements energy recuperation by capturing the energy stored in the MEMS capacitor during discharge phases and recycling it back to the power supply. The driver circuit includes switches and diodes configured to redirect the discharge current from the MEMS capacitor through a recuperation path that feeds energy back to the voltage source, rather than allowing it to dissipate completely. This recovering approach significantly reduces power consumption while managing the complexity through structured circuit topology.
2Power
If high-voltage conversion ratios are achieved through multiple switching cells, then the output voltage increases, but parasitic power dissipation losses increase due to the number of switching cells
Solution Approach 1:
The patent extracts and compensates for parasitic capacitance effects by explicitly modeling and accounting for the parasitic capacitances associated with each flying capacitor. The circuit design includes compensation mechanisms that address the parasitic power dissipation caused by these capacitances, allowing the use of multiple switching cells for high voltage conversion while mitigating their harmful parasitic effects through targeted compensation strategies.
3Speed
If driving frequency is increased for high-rate modulation, then the operational performance improves, but reactive power requirements increase due to the capacitive nature of MEMS devices
Solution Approach 1:
The patent implements continuous energy recycling through the recuperation circuit, which operates continuously during both charging and discharging phases of the MEMS capacitor. This continuous action captures reactive energy during discharge and returns it during charge phases, maintaining the high-frequency operation needed for performance while significantly reducing the net reactive power draw from the power supply.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient energy recuperation and reduced power consumption, supporting high-voltage conversion ratios and frequencies while maintaining efficiency in MEMS devices, suitable for audio and other applications.
Implementation Method 1
a series-parallel charge pump comprising a plurality of switched capacitor cells, wherein the series-parallel charge pump is configured for generating a plurality of coarse signal steps
Implementation Method 2
a flying capacitor coupled between the first output node and the second output node
Implementation Method 3
a digital-to-analog converter (DAC) coupled between the first output node and the second output node comprising a plurality of switched capacitors configured for generating a plurality of fine signal steps
Data Source
AI summary
A driver circuit includes a series-parallel charge pump including switched capacitor cells, wherein the series-parallel charge pump generates coarse signal steps at a first output node and a second output node; a flying capacitor coupled between the first output node and the second output node; and a digital-to-analog converter (DAC) coupled between the first output node and the second output node including switched capacitors for generating a plurality of fine signal steps.