Reduced PCI Express Packet Headers for Burst Efficiency

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Solution Overview

Problem

The PCI Express protocol faces inefficiencies in data transfer due to the size of its headers, which contribute to reduced bandwidth and increased pin count, making it a bottleneck in high-speed data communication, especially with the increasing demand for efficient data transfer in modern computer designs.

Innovation Solution

The implementation of reduced or compressed packet headers in the PCI Express protocol, where only the changed data field values from an initial packet header are transmitted, allowing for smaller header sizes and increased efficiency, particularly in memory read, write, and completion transactions, while maintaining compatibility with standard PCI Express specifications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If standard PCI Express headers are used, then complete data field information is transmitted, but header size increases reducing bandwidth efficiency

Engineering Contradiction:
Improvedata field information completenessVSAvoidbandwidth efficiency
Core Design Contradiction:
Loss of informationVSProductivity

Solution Approach 1:

The patent extracts only the essential changed fields from the complete PCI Express header, transmitting only those specific fields that contain new information. This selective extraction reduces header size while preserving all necessary data field information, directly resolving the contradiction between information completeness and bandwidth efficiency.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies different transmission qualities to different header fields based on their change status. Fields that change are transmitted with full detail, while fields that remain unchanged are omitted or marked as identical to previous transmissions. This local differentiation optimizes bandwidth usage while maintaining information integrity.

Inventive Principle:
Principle #3Local quality

2Loss of information

If complete PCI Express headers are transmitted, then all data field values are communicated, but pin count and power consumption increase

Engineering Contradiction:
Improvedata field value communicationVSAvoidpin count
Core Design Contradiction:
Loss of informationVSQuantity of substance

Solution Approach 1:

The patent extracts and transmits only the subset of header fields that have changed values, rather than transmitting all fields. This extraction approach reduces the quantity of data requiring communication through pins, directly addressing the contradiction between complete information communication and pin count reduction.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If standard sized headers are used, then protocol compatibility is maintained, but transfer efficiency decreases

Engineering Contradiction:
Improveprotocol compatibilityVSAvoidtransfer efficiency
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent introduces a dynamic header format that can adapt between standard and reduced sizes based on the change status of header fields. This dynamic adjustment allows the protocol to maintain compatibility with standard PCI Express specifications when full headers are transmitted, while optimizing transfer efficiency when reduced headers are used, resolving the contradiction between compatibility and efficiency.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8799550B2System and method for increased efficiency PCI express transaction
Publication Date: 2014.08.05 ATI TECHNOLOGIES ULC
  • US8799550B2 patent drawing
  • US8799550B2 patent drawing
  • US8799550B2 patent drawing

AI summary

A system and method using new PCI Express transaction layer packet headers so that unchanged header information within a burst of transactions does not need to be re-transmitted. After the first full packet header of a burst is sent, subsequent packet headers in the burst are smaller. Thus, more reduced headers can be transmitted over time with a resulting increased efficiency. Both sides of the PCI Express transaction must support this system and method for this approach to be enabled. Once enabled, both the PCI Express transmitter and receiver can use the regular full header PCI Express packets as well as the reduced header packets.