Redundancy Control Circuits for Row Hammer Refresh After Memory Repair

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The reliability of data stored in memory cells connected to adjacent word lines is degraded due to the row hammer phenomenon when a semiconductor device repeatedly performs active operations on specific word lines, especially after repair operations.

Innovation Solution

A semiconductor device is designed with a redundancy control signal generation circuit to determine if a row address has been repaired through a soft post-package repair operation and if a row hammer phenomenon has occurred, using selection address generation circuits to drive sub word lines, adjacent word lines, or redundancy word lines based on these determinations, and includes a memory bank with normal and redundancy regions to manage these operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a semiconductor device repeatedly performs active operations on specific word lines, then productivity is improved, but reliability deteriorates due to the row hammer phenomenon

Engineering Contradiction:
Improveactive operation performanceVSAvoiddata reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent performs preliminary refresh operations on adjacent word lines before the row hammer phenomenon causes data corruption. The control circuit detects when a word line is being repeatedly accessed and proactively activates refresh operations on neighboring word lines to prevent tunneling-induced data degradation, thereby maintaining reliability without reducing productivity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a control circuit as an intermediary between the word line access operations and data storage. This control circuit monitors access patterns, detects row hammer conditions, and coordinates refresh operations to mediate between continuous productivity demands and reliability requirements

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a repair operation is performed on a memory cell, then reliability is improved, but the row hammer phenomenon may still occur on adjacent word lines

Engineering Contradiction:
Improvememory cell reliabilityVSAvoidrow hammer effect on adjacent word lines
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by providing different control mechanisms for different word lines. After a repair operation on a specific word line, the control circuit identifies which word lines are adjacent and applies enhanced refresh operations specifically to those adjacent word lines, rather than uniformly treating all word lines equally

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The control circuit uses feedback from the repair operation status to adjust subsequent refresh operations. When a repair is performed on a word line, the circuit detects this condition and activates targeted refresh operations on adjacent word lines to compensate for the increased vulnerability to row hammer effects

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12475967B2Semiconductor devices for controlling refresh operations considering repair operations
Publication Date: 2025.11.18 SK HYNIX INC
  • US12475967B2 patent drawing
  • US12475967B2 patent drawing
  • US12475967B2 patent drawing

AI summary

A semiconductor device includes a redundancy control signal generation circuit configured to generate a redundancy control signal by determining whether a row address for an active operation has been repaired through a soft post package repair operation and determining whether a row hammer phenomenon has occurred with respect to the row address. The semiconductor device also includes a first selection address generation circuit configured to generate a first selection address for driving a sub word line or a redundancy word line from one of a repair address and a first internal address, based on the redundancy control signal. The semiconductor device further includes a second selection address generation circuit configured to generate a second selection address for driving the sub word line or the redundancy word line from one of a fixed address and a second internal address, based on the redundancy control signal.