Redundant Circuit Voting Using Adder Carry for SEU Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Integrated circuits face challenges with single event upsets (SEUs) due to cosmic rays or radioactive impurities, which require costly and resource-intensive multi-mode redundancy implementations to detect and correct errors, increasing circuit area and delay.
Innovation Solution
A programmable integrated circuit design that incorporates a second circuit to compute a majority vote function using a sum and carry signal from multiple identical sub-circuits, reducing the need for additional majority voting circuitry by leveraging existing arithmetic circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple copies of a design are implemented with majority voting circuitry to detect and correct single event upsets, then reliability is improved, but circuit area and cost increase
Solution Approach 1:
The patent combines the majority voting circuitry with existing arithmetic logic units (ALUs) in the processor core. The ALU's adder and logic circuits are repurposed to perform majority voting operations on redundant design copies, merging error detection functionality with existing arithmetic resources rather than adding separate voting circuits.
Solution Approach 2:
The arithmetic logic unit is designed to serve dual purposes: performing normal arithmetic operations and performing majority voting for error detection. The same adder and logic circuits that compute arithmetic results also compute majority votes on redundant design outputs, making the circuit universal and eliminating the need for dedicated voting hardware.
2Reliability
If multiple copies of a design are implemented with majority voting circuitry to detect and correct single event upsets, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent merges the majority voting logic with the existing ALU structure. The adder computes both the arithmetic sum and the majority vote simultaneously, and the logic circuits perform both arithmetic logic operations and voting operations, reducing the number of separate circuits needed.
Solution Approach 2:
The ALU is configured to perform multiple functions including arithmetic addition, logic operations, and majority voting. This multi-functionality reduces device complexity by eliminating dedicated voting circuits and using existing resources for multiple purposes.
3Reliability
If multiple copies of a design are implemented with majority voting circuitry to detect and correct single event upsets, then reliability is improved, but delay increases
Solution Approach 1:
The patent combines the majority voting operation with the arithmetic computation in the ALU. Since the adder and logic circuits already process the redundant design outputs to produce arithmetic results, the majority vote is computed in parallel during the same operation cycle, avoiding additional delay stages.
Solution Approach 2:
The ALU performs both arithmetic computation and majority voting simultaneously using the same hardware resources. This parallel execution eliminates the sequential delay that would occur if voting were performed in a separate stage after arithmetic computation.
Data Source
AI summary
Integrated circuits such as application specific integrated circuits or programmable logic devices may include multiple copies of a same circuit together with a majority vote circuit in a configuration that is sometimes also referred to as multi-mode redundancy. An adder circuit may be coupled to these multiple copies and produce a carry-out signal and a sum signal based on signals received from the multiple copies. The carry-out signal of the adder circuit may provide the result of the majority vote operation. A logic exclusive OR gate may perform a logic exclusive OR operation between the sum signal and the carry-out signal, thereby generating an error signal. The error signal may indicate that one of the multiple copies produces an output that is different than the outputs produced by the other copies.


