Redundant Logic Row Routing for Repairable Integrated Circuits
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Solution Overview
Problem
Conventional row-based redundancy schemes in programmable integrated circuits require excessive wiring and area overhead due to the use of vertical wires spanning multiple rows, which complicates defect repair and affects manufacturing yield.
Innovation Solution
The implementation of repairable logic regions with a spare row and bypass circuits, where each row includes a multiplexing circuit and an associated driver to manage vertical routing segments, allowing for efficient defect repair by switching the spare row into use and minimizing wiring length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vertical wires spanning multiple rows are used to interconnect different rows in each logic region, then redundancy repair capability is achieved, but wiring overhead and area overhead increase significantly
Solution Approach 1:
The patent segments the vertical routing into multiple short vertical routing segments, each spanning only adjacent rows. Instead of using single long vertical wires that span multiple rows, the routing is divided into segments that are locally connected through multiplexers at each row boundary. This segmentation reduces the wiring overhead and area requirements while maintaining the redundancy repair capability.
Solution Approach 2:
The patent introduces multiplexers as intermediary elements at each row boundary to connect the segmented vertical routing segments. These multiplexers act as mediators that can selectively connect to either the normal row or the spare row, enabling redundancy repair without requiring long vertical wires. The multiplexers facilitate the switching between normal and spare rows while keeping the vertical routing segments short.
2Reliability
If vertical wires spanning multiple rows are used for redundancy schemes, then defect repair is enabled, but device complexity increases due to direct connections to routing circuitry in two target rows
Solution Approach 1:
The vertical routing is segmented into multiple short segments rather than using single long wires. Each segment connects only adjacent rows, reducing the complexity of wiring connections. The multiplexers at row boundaries manage the switching between segments, simplifying the overall wiring architecture while enabling defect repair.
Solution Approach 2:
The patent introduces dynamic switching capability through multiplexers that can reconfigure the vertical routing connections based on defect detection. The multiplexers dynamically select whether to connect to the normal row or the spare row, enabling adaptive repair without requiring complex static wiring arrangements for all possible defect scenarios.
3Reliability
If spare row is added to each logic region for redundancy, then manufacturing yield is improved, but area overhead increases
Solution Approach 1:
The patent merges the functionality of the spare row with the normal rows by using shared multiplexers and segmented vertical routing. The spare row is integrated into the existing logic region structure rather than being added as a completely separate entity. This merging approach allows the spare row to be efficiently utilized for repair while minimizing additional area overhead.
Solution Approach 2:
The multiplexers and vertical routing segments serve multiple functions: they enable normal operation during normal mode, enable defect detection and repair during redundant mode, and provide a unified interface for both operational modes. This multi-functionality reduces the need for separate dedicated structures, thereby minimizing area overhead while maintaining manufacturing yield improvement.
Data Source
AI summary
Integrated circuits with repairable logic regions are provided. Each logic region may be organized into a predetermined number of rows of logic circuitry, one of which serves as a spare row. A repairable region may be operable in normal mode or redundant mode. In normal mode, the spare row is deactivated. When one of the logic region rows contains defective circuitry, that logic region is operated in redundant mode so that each row below the bad row is shifted down by one row and the spare row is engaged to serve as the last row to repair that region. Each row may include a multiplexer and an associated driver that drives a corresponding vertical routing segment from one row to the next. Each vertical routing segment has the option of being driven by its logically equivalent vertical wire in the immediate preceding row by configuring the corresponding multiplexer.