Redundant Memory Cell Voting for Soft Error Tolerance
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Solution Overview
Problem
Volatile memory elements in integrated circuits are susceptible to soft error upsets caused by cosmic rays and radioactive impurities, leading to data corruption and increased complexity and power consumption in error correction mechanisms.
Innovation Solution
Implementing an array of memory elements with redundant cells and a voting circuit that produces an accurate output by majority voting, capable of correcting single and double cell errors in static random-access memory and thyristor-based circuits, respectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If periodic reading out of data from memory array is implemented to detect errors, then error detection capability is improved, but power consumption increases
Solution Approach 1:
The patent implements preliminary error correction by storing redundant copies of data in multiple memory cells before reading operations. The voting circuit performs error correction in advance by comparing multiple copies and selecting the correct value, so that when data is eventually read, it is already corrected without requiring additional power-intensive error detection cycles
Solution Approach 2:
The patent creates multiple redundant copies of the same data in separate memory cells within each memory element. These copies serve as backups that can be used for error detection and correction through voting logic, eliminating the need for periodic power-consuming read operations to verify data integrity
2Reliability
If error correction codes and redundant information are stored in memory array to provide soft error tolerance, then immunity to soft error upset is improved, but device complexity increases
Solution Approach 1:
The patent divides each memory element into multiple independent memory cells (typically three or five cells per element) that store redundant copies of the same data. This segmentation allows the system to tolerate errors in individual cells while maintaining overall data integrity through voting logic that compares the segmented copies
Solution Approach 2:
The voting circuit automatically performs error correction by comparing the redundant copies stored in multiple memory cells and selecting the correct value based on majority voting. This self-correcting mechanism operates continuously without requiring external error correction codes or complex control logic, thereby reducing overall device complexity while maintaining high reliability
3Reliability
If multiple redundant memory cells are implemented in each memory element, then tolerance to soft error upset events is improved, but manufacturing cost increases
Solution Approach 1:
The patent combines multiple memory cells into a single memory element structure where three or five cells work together as one functional unit. The voting circuit merges the outputs of these cells to produce a single corrected output, effectively combining redundant resources to achieve error tolerance without requiring separate error correction hardware for each cell
Solution Approach 2:
The patent changes the structural parameter of memory elements by increasing the number of cells per element from the conventional single-cell design to multi-cell configurations (three or five cells). This parameter change enables error tolerance through redundancy while the voting circuit efficiently combines these cells to maintain reasonable area utilization and manufacturing cost
Data Source
AI summary
An integrated circuit may have an array of memory elements. Each memory element may have multiple memory cells. Each memory element may have a voting circuit that receives signals from the memory cells in that memory element. The voting circuit can produce an output based on the signals. The signals stored by the memory cells of each memory element may be redundant so that the voting circuit can produce an accurate output even in the event that a radiation strike causes some of the memory cells to flip their states to erroneous values. The memory elements may be based on memory cells such as static random-access memory cells and thyristor-based cells.