Reference ADC Sampling Point Shifting for Spur-Free Calibration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional time-interleaved ADCs face challenges with offset, gain, and timing mismatches due to the need for precise alignment of sampling timing between the reference ADC and sub-DACs, which can lead to disturbances and spurs in the sampling network.
Innovation Solution
An ADC system employing a reference ADC with sampling point shifting, where the sampling clocks have the same frequency but different phases, and a calibration method that adjusts sample values to compensate for timing-skew, using a sampling control circuit to ensure the reference ADC does not disturb the main ADC's sampling operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the sampling timing of the reference ADC is aligned with that of the main ADC, then timing-skew calibration can be performed, but the reference ADC will pull or disturb the sampling network and cause spurs
Solution Approach 1:
Instead of aligning the reference ADC sampling timing with the main ADC (conventional approach), the patent inverts the approach by intentionally shifting the reference ADC sampling timing to be misaligned with the main ADC. This inversion prevents the reference ADC from disturbing the main ADC's sampling network while still enabling timing-skew calibration through digital processing of the misaligned samples.
2Measurement precision
If multiple reference ADCs are used for calibration, then calibration accuracy may be improved, but the area and cost penalties increase
Solution Approach 1:
The patent makes a single reference ADC perform multiple functions: it calibrates multiple main ADCs in a time-interleaved system without requiring separate reference ADCs for each main ADC. By using sampling point shifting and digital processing, one reference ADC universally serves the calibration needs of the entire system, reducing area and cost while maintaining calibration accuracy.
Data Source
AI summary
An analog-to-digital converter (ADC) system includes a main ADC, a reference ADC, a sampling control circuit, and a calibration circuit. The main ADC obtains a first sampled input voltage by sampling an analog input according to a first sampling clock, and performs analog-to-digital conversion upon the first sampled voltage to generate a first sample value. The reference ADC obtains a second sampled voltage by sampling the analog input according to a second sampling clock, and performs analog-to-digital conversion upon the second sampled voltage to generate a second sample value. The sampling control circuit controls the second sampling clock to ensure that the second sampling clock and the first sampling clock have a same frequency but different phases, and adjusts the second sample value to generate a reference sample value. The calibration circuit applies calibration to the main ADC according to the first sample value and the reference sample value.


