Reference Array ADC Compensation for CIM Temperature Drift
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Solution Overview
Problem
Existing temperature compensation methods for neural network computing-in-memory arrays face challenges such as high power consumption, reduced operational speed, and incompatibility with 3D stacking technology due to the use of operational amplifiers and subthreshold current characteristics, which affect the accuracy and scalability of neural networks.
Innovation Solution
A temperature compensation circuit using reference arrays with the same structure as the computing-in-memory array, providing a reference voltage for ADCs to eliminate temperature drift in mobility, allowing for accurate digital output without affecting external temperature changes, and enabling 3D stacking by decoupling peripheral circuits from the device array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If operational amplifiers are used for temperature compensation, then temperature-independent output voltage is achieved, but power consumption increases and operational speed is restricted
Solution Approach 1:
The patent extracts the temperature compensation function from the main computing array by using separate reference arrays. These reference arrays generate reference currents that are used to compensate for temperature effects in the ADC, allowing the main array to focus on computing operations without the overhead of operational amplifiers for temperature compensation.
Solution Approach 2:
The patent creates reference arrays that are copies of the computing array structure but configured to generate reference currents instead of computation results. These reference arrays replicate the temperature-dependent characteristics of the main array, allowing for accurate temperature compensation without requiring complex operational amplifier circuits.
2Reliability
If operational amplifiers are used for temperature compensation, then temperature-independent output voltage is achieved, but operational speed is restricted due to steady state requirement
Solution Approach 1:
The patent extracts the temperature compensation function from the main computing array by using separate reference arrays. These reference arrays generate reference currents that are used to compensate for temperature effects in the ADC, allowing the main array to focus on computing operations without the overhead of operational amplifiers for temperature compensation.
Solution Approach 2:
The patent implements temperature compensation as a periodic operation that occurs in conjunction with each computing operation. The reference arrays continuously generate reference currents that track temperature variations, enabling real-time compensation without requiring operational amplifiers to reach steady state.
3Reliability
If compensation circuit and computing-in-memory array are in the same process layer, then temperature compensation is effective, but 3D stacking technology cannot be utilized
Solution Approach 1:
The patent transitions from a two-dimensional planar integration approach to a three-dimensional stacking architecture. The reference arrays and computing arrays are placed in different layers, with vertical interconnects (through-silicon vias) providing electrical connections. This dimensional change enables both effective temperature compensation and utilization of 3D stacking technology for higher integration density.
Solution Approach 2:
The patent segments the computing system into separate functional layers: computing arrays in one layer and reference arrays in another layer. This segmentation allows each layer to be optimized independently while maintaining their functional relationship through vertical interconnects, enabling both temperature compensation and 3D stacking compatibility.
4Area of stationary object
If reference arrays are sparsely inserted in computing-in-memory array, then area increase is minimized, but temperature compensation coverage may be insufficient
Solution Approach 1:
The patent makes the reference arrays multi-functional by having them serve both as temperature compensation sources and as part of the overall computing array structure. The reference arrays use the same floating-gate device technology and can be configured to provide reference currents for multiple ADCs, maximizing their utility while minimizing area overhead.
Solution Approach 2:
The patent implements a sparse but sufficient distribution of reference arrays throughout the computing array. Rather than providing full coverage, the reference arrays are placed at strategic locations where they can effectively compensate for temperature effects across larger regions, achieving adequate compensation with minimal area overhead.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution minimizes power consumption and area increase, ensures high operational accuracy across temperature changes, and supports large-scale, high-computing neural networks with reduced noise susceptibility, making it suitable for 3D stacking technology.
Implementation Method 1
The reference current is converted into a reference voltage of the ADC through an I-V conversion resistor
Implementation Method 2
the weights can be stored by changing the threshold voltage of the floating-gate devices in the computing-in-memory array
Implementation Method 3
the multiply-accumulate operation of the input data and the weights can be realized by subtraction of output currents of two rows of floating-gate devices
Data Source
AI summary
The disclosure discloses a temperature compensation circuit and method for a neural network computing-in-memory array. Reference arrays sparsely inserted in the computing-in-memory array are adopted to provide a reference voltage for ADCs, so that an input voltage and a reference voltage of the ADCs have a same temperature coefficient. Finally, after analog-to-digital conversion by the ADC, the digital output of the ADC is not affected by the external temperature, thereby ensuring the operational precision of the neural network. According to the temperature compensation circuit of the disclosure, the reference arrays have the same structure as the computing-in-memory array. The insertion density of the reference arrays is related to the temperature field where the computing-in-memory arrays are located. One reference array may provide the reference voltage of the ADC for a plurality of computing-in-memory arrays, thereby minimizing the increase of area and power consumption caused by inserting the reference arrays.