Reference Current Circuit for Fast NOR Flash Read Speed

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Solution Overview

Problem

In NOR flash memory, the rate of rise of the reference current is limited, which slows down data reading and determination in multivalued memory cells due to the reliance on charging from ground potential and the interruption of current mirroring, leading to longer discharge times and reduced accuracy in reference current settings.

Innovation Solution

A semiconductor memory with a reference current generating circuit that includes a diode-connected MOS transistor and a series of MOS transistors for current mirroring, allowing for faster charging and discharging of the output terminal, thereby increasing the rate of rise of the reference current by using a combination of pMOS and nMOS transistors to control and amplify the current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the output section is charged by a MOS transistor making up the current mirror circuit from ground potential, then the reference current is generated, but the rate of rise of the reference current is limited due to the discharge of the output MOS transistor

Engineering Contradiction:
Improverate of rise of reference currentVSAvoiddischarge time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent divides the reference current generation into two independent sections: a reference current generating section (using current mirror circuit) and an amplifier section (using operational amplifier). This segmentation allows the reference current to be generated and amplified separately, enabling faster rise time by eliminating the discharge limitation of a single MOS transistor while maintaining current accuracy through the operational amplifier's high gain.

Inventive Principle:
Principle #1Segmentation

2Reliability

If charging from the current mirror circuit is interrupted by the discharge of the output MOS transistor, then the circuit operates, but the closer to the direct-current potential the discharge time becomes longer

Engineering Contradiction:
Improvecurrent accuracyVSAvoidrate of rise of reference current
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent introduces an operational amplifier as an intermediary between the current mirror circuit and the output. The operational amplifier receives the reference current from the current mirror circuit, amplifies it with high precision, and outputs the amplified current. This intermediary eliminates the discharge time limitation while preserving current accuracy through the operational amplifier's high gain and stable operating characteristics.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Stability of the object's composition

If the reference current is generated using a current mirror circuit, then the current is stabilized, but the determination time for multivalued memory cells increases

Engineering Contradiction:
Improvecurrent stabilityVSAvoiddetermination time
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The patent combines a static current mirror circuit (providing stable reference current) with a dynamic amplifier section (operational amplifier that can rapidly respond and amplify). The current mirror ensures stable current generation, while the operational amplifier's high gain and fast response capability enable rapid determination of multivalued memory cells, reducing determination time without sacrificing current stability.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables a faster rate of rise for the reference current, enhancing the speed of reading operations in multivalued memory cells by eliminating the need for charging from ground potential and improving current accuracy, thus reducing determination time.

Implementation Method 1

a second MOS transistor of the first conductivity type which has one end connected to the power supply and is fed with a current obtained by current mirroring a current passing through the first MOS transistor

Methodology Applied
Scientific EffectCurrent mirroring:

Implementation Method 2

a first MOS transistor of first conductivity type which has one end connected to a power supply and is diode-connected

Methodology Applied
Scientific EffectDiode connection effect:

Implementation Method 3

the amplifier section comprising: a fourth MOS transistor of the first conductivity type which has one end connected to the power supply and is diode-connected; a fifth MOS transistor of the second conductivity type which is connected between an other end of the fourth MOS transistor and the ground and has a gate connected to an output terminal

Methodology Applied
Scientific EffectOperational amplification:

Data Source

PatentUS7751252B2Semiconductor memory with a reference current generating circuit having a reference current generating section and an amplifier section
Publication Date: 2010.07.06 KIOXIA CORP
  • US7751252B2 patent drawing
  • US7751252B2 patent drawing
  • US7751252B2 patent drawing

AI summary

A semiconductor memory capable of storing and reading data in a memory cell for holding the data corresponding to a threshold voltage has a reference current generating circuit having a reference current generating section and an amplifier section.