Reference Voltage Generation Circuit for Low Voltage Power-On Detection
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Solution Overview
Problem
Conventional bandgap reference circuits in semiconductor devices fail to accurately generate a reference voltage at low power supply voltages, leading to incorrect power-on detection and potential operational failures, especially in NAND flash memories operating at 1.8V, due to the output of a low reference voltage before the power supply reaches the target voltage.
Innovation Solution
A reference voltage generation circuit with a reference voltage guarantee portion that ensures the reference voltage reaches the desired level by maintaining the voltage difference between nodes VN and VP below a determined value, outputting a detection signal to enable accurate power-on detection, preventing incorrect operation at low voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional bandgap reference circuit is used to generate reference voltage, then the circuit can operate at low power supply voltages, but the reference voltage output is inaccurate and lower than the desired voltage
Solution Approach 1:
The patent introduces a reference voltage guarantee portion that performs preliminary verification before the reference voltage is used for power-on detection. This portion monitors whether the reference voltage has reached the desired level by comparing it with an internal voltage, and only enables the power-on detection function when the reference voltage is guaranteed to be accurate. This preliminary action resolves the contradiction by ensuring voltage accuracy is verified before operation, allowing the system to operate at low voltages while maintaining detection precision.
2Speed
If the reference voltage is set lower to enable operation at low power supply voltages, then the circuit can start earlier, but the power-on detection signal is output incorrectly causing internal circuit malfunction
Solution Approach 1:
The patent implements a feedback mechanism where the reference voltage guarantee portion continuously monitors the reference voltage level and provides feedback control. When the reference voltage reaches the desired level, the guarantee portion outputs a signal to enable the power-on detection function. This feedback ensures that the power-on detection is performed at the correct timing when voltage accuracy is guaranteed, preventing incorrect operation while enabling timely startup.
3Loss of time
If the power-on detection circuit operates before the reference voltage reaches the desired level, then the system starts faster, but the detection accuracy deteriorates leading to incorrect operation
Solution Approach 1:
The reference voltage guarantee portion performs preliminary verification of the reference voltage level before enabling the power-on detection function. This preliminary action ensures that detection accuracy is maintained by only enabling detection when the reference voltage has reached the desired level, preventing detection errors while minimizing delay through efficient monitoring.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Guarantees normal operation of internal circuits by ensuring the reference voltage reaches the desired level before power-on detection, preventing erroneous starts and ensuring stable operations in semiconductor devices.
Implementation Method 1
a bandgap reference circuit (hereinafter referred to as a BGR circuit) that is almost independent of the variation in the power supply voltage Vcc or the operation temperature is used in the reference voltage generation circuit 20
Data Source
AI summary
A reference voltage generation circuit of the invention includes: PMOS transistors P1 and P2 configured to provide current sources with same current to a first current path and a second current path; a bipolar transistor Q1 connected to the PMOS transistors P1 on the first current path; a bipolar transistor Q2 connected to the PMOS transistors P2 on the second current path; a differential amplifier AMP controlling the gates of the PMOS transistors P1 and P2, such that a voltage of a node VN and a voltage of a node VP are equal; an output node BGR outputting a reference voltage Vref; and a reference voltage guarantee portion 130 outputting a detecting signal BGRDET when a differences between the voltage of the node VN and the voltage of the node VP is maintained below a determined value.