Reflection-Canceling Package Trace Design for Signal Integrity
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Solution Overview
Problem
Existing integrated circuit packaging technologies face challenges in minimizing signal reflections and distortion due to impedance mismatches, which are typically addressed by increasing circuit complexity and power consumption through active cancellation or equalization.
Innovation Solution
The design involves determining and setting the length of substrate traces to create a propagation delay difference equal to half the symbol interval, allowing for partial cancellation of signal reflections without the need for complex active components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If active cancellation or equalization is used to address signal reflections, then signal integrity is improved, but circuit complexity and power consumption increase
Solution Approach 1:
The patent converts the harmful signal reflections into beneficial effects by carefully designing the trace lengths to create controlled reflections that cancel each other out. The first and second trace reflections are timed to arrive at the receiver with opposite polarities, transforming the harmful reflection phenomenon into a useful cancellation mechanism that improves signal integrity without requiring complex active circuits
Solution Approach 2:
The invention changes the physical parameter of trace length to control reflection timing. By setting specific length relationships between traces (where the propagation delay difference equals half the symbol interval), the reflections are automatically timed to cancel each other, achieving signal integrity improvement through passive geometric design rather than active circuit adjustment
2Reliability
If active cancellation or equalization is used to address signal reflections, then signal integrity is improved, but power consumption increases
Solution Approach 1:
The patent converts the harmful signal reflections into beneficial effects by carefully designing the trace lengths to create controlled reflections that cancel each other out. The first and second trace reflections are timed to arrive at the receiver with opposite polarities, transforming the harmful reflection phenomenon into a useful cancellation mechanism that improves signal integrity without requiring complex active circuits
Solution Approach 2:
The transmission line structure serves itself by using its own reflections to cancel out harmful interference. The trace length design ensures that reflections from different interfaces (bumps, balls, traces) automatically arrive at the receiver with timing and polarity relationships that produce cancellation, eliminating the need for external power-consuming equalization circuits
3Reliability
If trace lengths are adjusted to cancel reflections, then signal integrity is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent achieves partial cancellation of reflections by setting the propagation delay difference to half the symbol interval, which is sufficient to significantly reduce intersymbol interference without requiring perfect cancellation. This partial action approach provides robust performance that is tolerant of manufacturing variations, as complete precision is not necessary to achieve the beneficial cancellation effect
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces intersymbol interference and enhances system performance by aligning signal pulse reflections to cancel each other, thereby improving signal integrity and reducing the complexity of equalization needed.
Implementation Method 1
signal reflections and thereby introduce distortion into the conveyed signals
Implementation Method 2
determining a first propagation delay for an electrical signal to traverse the first substrate trace
Data Source
AI summary
A package trace design technique provides at least partial cancelation of reflections. In one illustrative method of providing a high-bandwidth chip-to-chip link with a first die coupled to a second die via a first substrate trace, an intermediate trace, and a second substrate trace, the method includes: (a) determining a first propagation delay for an electrical signal to traverse the first substrate trace, the electrical signal having a predetermined symbol interval; (b) determining a second propagation delay for the electrical signal to traverse the second substrate trace; and (c) setting a length for at least one of the first and second substrate traces, the length yielding a difference between the first and second propagation delays, the difference having a magnitude equal to half the predetermined symbol interval.