Reflective Electrode Border Layout for Residue-Free LCD Array Substrates
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Solution Overview
Problem
In the manufacturing of liquid crystal display (LCD) array substrates, there is a height difference at the overlapping position of gate and data lines, leading to poor displacement effects during the patterning of reflective material films, resulting in residues and potential short-circuits between adjacent reflective layers.
Innovation Solution
The array substrate design includes a border for each reflective electrode with first and second sub-borders extending in intersecting directions, and chamfer borders connecting these sub-borders, ensuring that the intersection of the sub-borders' extension lines is outside the reflective electrode's border, thereby increasing the spacing between adjacent reflective electrodes at overlapping positions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the reflective material film is patterned at the overlapping position of gate and data lines, then the reflective electrodes can be formed, but the height difference causes poor displacement effects leading to residues and potential short-circuits
Solution Approach 1:
The patent applies preliminary action by designing the reflective electrode pattern in advance to avoid the overlapping region of gate and data lines. The reflective electrode is configured to be positioned away from where the gate line and data line overlap, so that when the reflective material film is patterned, the developing solution can properly displace without being obstructed by the height difference at the overlapping position, thereby preventing residues and short-circuits before they occur
Solution Approach 2:
The patent applies local quality by creating a non-uniform distribution of reflective electrode material. Specifically, the reflective electrode pattern is designed with different densities or presence in different regions: it is absent or reduced in the overlapping region of gate and data lines, while maintaining full coverage in non-overlapping regions. This local variation in reflective electrode quality ensures proper developing solution displacement at critical overlapping positions while maintaining display performance in other areas
2Reliability
If the reflective electrode is positioned to avoid the overlapping region, then residues and short-circuits are prevented, but the spacing between adjacent reflective electrodes increases
Solution Approach 1:
The patent applies parameter changes by adjusting the positional parameters of the reflective electrode relative to the gate and data lines. Specifically, the reflective electrode pattern is shifted or scaled so that its boundaries align with the non-overlapping regions of the conductive lines. This parameter optimization allows the reflective electrode to be positioned as close as possible to the overlapping region without actually occupying it, thereby minimizing the spacing increase while still preventing residues and short-circuits
Data Source
AI summary
An array substrate includes: a first substrate; a plurality of gate lines and a plurality of data lines; a plurality of thin film transistors; and a plurality of reflective electrodes. The plurality of gate lines and the plurality of data lines define a plurality of sub-pixel regions. A thin film transistor is located in a sub-pixel region. A reflective electrode is located in the sub-pixel region and electrically connected to the thin film transistor in the same sub-pixel region. Each reflective electrode has a border including a plurality of first sub-borders extending in a first direction, a plurality of second sub-borders extending in a second direction, and a plurality of chamfer borders each connecting a first sub-border and a second sub-border that are adjacent; and an intersection of extension lines of the first sub-border and the second sub-border is located outside the border of the reflective electrode.