Memory Refresh Scheduling With Replacement Counts for Row-Hammer

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Solution Overview

Problem

Existing memory systems face inefficiencies and increased power consumption due to excessive target refresh operations aimed at mitigating the row-hammer phenomenon, which occurs when specific word lines are activated excessively, leading to data loss.

Innovation Solution

A memory system that adjusts the frequency of refresh commands based on a replacement counting value, replacing target refresh operations with normal refresh operations when necessary, and counts the number of replacements to optimize command issuance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If target refresh operations are performed frequently to mitigate row-hammer phenomenon, then data reliability is improved, but power consumption increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic adjustment of refresh operation types based on real-time monitoring of word line activation counts. The memory controller transitions from static refresh scheduling to dynamic selection between normal refresh and target refresh operations, adapting the refresh strategy to actual usage patterns and thereby reducing unnecessary power consumption while maintaining data reliability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of refresh operation type (normal vs. target refresh) based on monitored activation counts. By adjusting this parameter dynamically according to actual row-hammer risk levels, the system optimizes the balance between data reliability and power consumption, performing expensive target refresh operations only when necessary.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If target refresh operations are performed frequently to mitigate row-hammer phenomenon, then data reliability is improved, but command issuance efficiency deteriorates

Engineering Contradiction:
Improvedata reliabilityVSAvoidcommand issuance efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic adjustment of refresh operation types based on real-time monitoring of word line activation counts. The memory controller transitions from static refresh scheduling to dynamic selection between normal refresh and target refresh operations, adapting the refresh strategy to actual usage patterns and thereby reducing unnecessary power consumption while maintaining data reliability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameter of refresh operation type (normal vs. target refresh) based on monitored activation counts. By adjusting this parameter dynamically according to actual row-hammer risk levels, the system optimizes the balance between data reliability and power consumption, performing expensive target refresh operations only when necessary.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If replacement counting is implemented to track normal refresh substitutions, then command issuance optimization is improved, but device complexity increases

Engineering Contradiction:
Improvecommand issuance optimizationVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory device autonomously maintains the replacement counting value without requiring external control logic. The counting mechanism is integrated into the memory device itself, allowing it to self-monitor and self-report replacement occurrences, thereby simplifying the overall system architecture while enabling optimization based on replacement data.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12482509B2Memory device for performing target refresh operation, memory system and operating method of memory system
Publication Date: 2025.11.25 SK HYNIX INC
  • US12482509B2 patent drawing
  • US12482509B2 patent drawing
  • US12482509B2 patent drawing

AI summary

A memory system includes: a memory controller configured to: issue a normal refresh command and a refresh management command, and adjust, based on a replacement counting value, an issuance frequency of at least one of the normal refresh command and the refresh management command; and a memory device configured to: perform a first refresh operation corresponding to the normal refresh h command and a second refresh operation corresponding to the refresh management command, and replace the second refresh operation with the first refresh operation according to a memory information signal, count a number of times of the replacing to generate the replacement counting value, and provide the replacement counting value.