Physical Register File Bypass via Instruction Tagging
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Solution Overview
Problem
In processor cores, the allocation of physical registers is inefficient as they remain allocated for multiple clock cycles even after the data is no longer needed, leading to reduced availability for other instructions and increased processing time.
Innovation Solution
A scheduling circuit allocates physical registers only when necessary and assigns tags to indicate that results can be passed directly between instructions without using the register file, allowing for early release and reducing the number of allocated registers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If physical registers are allocated to store results of instructions in a group, then data storage reliability is improved, but register availability for other instructions deteriorates and processing time increases
Solution Approach 1:
The patent extracts the essential function of data storage from the physical register file by introducing a bypass mechanism. When a result of an instruction is needed by another instruction in the same group, the data is directly passed through the bypass path without being stored in a physical register, thus removing the unnecessary registration step while maintaining data availability.
Solution Approach 2:
The patent introduces a tagging mechanism as an intermediary between the execution unit and the register file. The tag associated with each instruction result enables the scheduling circuit to identify and directly route data between instructions without physical register allocation, acting as a mediator that eliminates the need for intermediate storage.
2Reliability
If physical registers are allocated to store results of instructions, then data integrity is improved, but the number of required physical registers increases
Solution Approach 1:
The patent extracts the data storage function from the physical register file for specific cases where data is immediately consumed by another instruction in the same group. By removing the registration step for these cases, the total number of required physical registers is reduced while data integrity is maintained through the bypass mechanism.
Solution Approach 2:
Instead of physically storing data in registers, the patent uses tags as virtual copies or references to the data. The tagging system allows the scheduling circuit to track and manage data flow without requiring physical register allocation, effectively replacing physical storage with a lightweight referencing mechanism.
3Productivity
If tags are assigned to indicate direct data passing between instructions, then register utilization is improved, but scheduling complexity increases
Solution Approach 1:
The tagging mechanism serves multiple functions simultaneously: it identifies instruction results, tracks data dependencies, enables bypass routing, and manages register allocation. This multi-functionality reduces the need for separate mechanisms for each task, offsetting the added complexity with consolidated functionality.
Solution Approach 2:
The tagging system is automatically managed by the scheduling circuit without requiring external intervention or complex control logic. The tags are automatically assigned, updated, and cleared based on instruction execution and data flow, allowing the system to self-manage the complexity of register utilization and data tracking.
Data Source
AI summary
An example apparatus includes a plurality of execution units, a physical register file that includes a plurality of physical registers, an instruction buffer, and a scheduling circuit. The instruction buffer may receive a group of instructions to be performed by the plurality of execution units. The scheduling circuit may allocate a physical register of the plurality of physical registers in the physical register file to store an operand of a particular instruction of the group of instructions. The scheduling circuit may also, in response to determining that a result of the particular instruction is used as an operand for a different instruction of the group of instructions, assign a tag to the particular instruction and to the different instruction to indicate that the result of the particular instruction will be sent to the different instruction without using the physical register file.