Register Renaming Without Extra Physical Registers
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Solution Overview
Problem
Existing data processing apparatuses face challenges in implementing register renaming due to the additional hardware and complexity it requires, which limits its use in small, low-cost, low-power devices, especially in security-sensitive applications where it is needed for enhanced protection against attacks.
Innovation Solution
A data processing apparatus that performs register renaming without increasing the physical register set or adding instructions to the instruction flow, by using a one-to-one mapping storage to alter the mapping between logical and physical registers only when multiple registers are written to, and employing random number generation for enhanced security.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional register renaming techniques are implemented, then security against attacks is improved, but device complexity and hardware requirements increase
Solution Approach 1:
The patent extracts the essential register renaming functionality from the complex traditional implementation by removing the need for additional physical registers. The invention uses a register renaming table that maps logical registers to physical registers, allowing renaming without increasing the physical register file size. This extraction of the core renaming mechanism from the bulky traditional implementation resolves the contradiction between security improvement and device complexity reduction.
Solution Approach 2:
The patent changes the parameter of register mapping by introducing a dynamic renaming table that can be updated during execution. Instead of having fixed additional registers, the system dynamically remaps logical registers to available physical registers using the renaming table. This parameter change allows the same physical registers to serve multiple logical registers over time, achieving security benefits without increasing hardware complexity.
2Adaptability or versatility
If additional physical registers are provided for register renaming, then register renaming capability is improved, but area and cost increase
Solution Approach 1:
The patent introduces dynamic remapping of registers through a renaming table that can be updated during instruction execution. Instead of providing additional static physical registers, the system dynamically changes the mapping between logical and physical registers. This dynamic approach allows the same physical registers to be reused for different logical registers at different times, achieving renaming capability without increasing the register file area.
Solution Approach 2:
The patent creates a virtual copy of the register mapping through the renaming table, which stores the mapping relationships between logical and physical registers. This virtual mapping layer allows multiple logical registers to reference the same physical register at different times without requiring additional physical registers. The renaming table acts as a virtual copy that enables renaming functionality without increasing physical hardware area.
3Reliability
If register renaming is implemented in low-power devices, then security is improved, but power consumption increases
Solution Approach 1:
The patent applies partial renaming by only performing register renaming when necessary, specifically when security threats are detected or when instruction dependencies require it. The system can choose to rename registers selectively rather than always, reducing the power consumption overhead compared to continuous renaming. This partial action approach maintains security benefits while minimizing power consumption in low-power devices.
4Adaptability or versatility
If more physical registers are allocated for renaming, then renaming flexibility is improved, but manufacturing cost increases
Solution Approach 1:
The patent makes the physical registers universal by allowing them to serve multiple logical registers over time through dynamic remapping. The same physical register can be allocated to different logical registers at different times, providing renaming flexibility without requiring additional registers. This multi-functionality approach reduces manufacturing costs by maximizing the utilization of existing physical registers rather than requiring dedicated registers for each logical register.
Data Source
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AI summary
A data processing apparatus and method are provided for performing register renaming. The data processing apparatus has processing circuitry for performing data processing operations in response to data processing instructions, the data processing instructions referencing logical registers. Further, a set of physical registers are provided for storing data values for access by the processing circuitry when performing the data processing operations. Register renaming storage stores a one-to- one mapping between the logical registers and the physical registers, with the register renaming storage being accessed by the processing circuitry when performing the data processing operations in order to map the referenced logical registers to corresponding physical registers. Update circuitry is arranged, responsive to a current data processing operation performed by the processing circuitry requiring data to be written in respect of multiple logical registers, to identify the physical registers corresponding to those multiple logical registers in the register renaming storage. It then alters within the register renaming storage the one-to-one mapping between those multiple logical registers and the identified physical registers, such that the altered one-to-one mapping is employed when performing the current data processing operation. For any other data processing operations that do not require multiple logical registers to be written to, no such renaming is performed. Such an approach allows the security-related benefits of register renaming to be achieved for certain data processing operations, without requiring any increase in size of the physical register set, and without requiring any modification to the software executing on the processing circuitry.