Reinforcement Member for Semiconductor Memory Chip Stress Relief
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Solution Overview
Problem
In semiconductor memory packages, the peripheral portion of memory chips is prone to cracking due to bending and contraction stresses caused by the heating and compression processing of the controller chip and film on device (FOD) layer, leading to potential cracks during temperature cycle tests.
Innovation Solution
A reinforcement member with a lower coefficient of linear expansion than the FOD layer is disposed at the peripheral portion of the memory chip, which relieves stress and prevents cracking by maintaining the memory chip in a plane state during heating and compression, and controlling the FOD layer's protrusion or retraction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the controller chip is buried in the FOD layer through heating and compression processing, then the controller chip is securely positioned, but the peripheral portion of the memory chip bends and develops cracks due to compression stress
Solution Approach 1:
A reinforcement member is introduced as an intermediary element between the memory chip and the FOD layer. This reinforcement member has a lower coefficient of linear expansion than the FOD layer, allowing it to maintain dimensional stability during thermal processing and prevent the FOD layer from excessively contracting and bending the memory chip peripheral portion.
Solution Approach 2:
The coefficient of linear expansion parameter is deliberately selected for the reinforcement member to be lower than that of the FOD layer. This parameter difference ensures that during cooling after heating, the FOD layer contracts more than the reinforcement member, creating a controlled stress distribution that prevents memory chip peripheral portion bending and cracking.
2Ease of manufacture
If the FOD layer is heated and compressed to bury the controller chip, then the packaging is completed, but the FOD layer contracts upon cooling and causes stress concentration at the memory chip periphery
Solution Approach 1:
The invention utilizes the difference in thermal expansion coefficients between the FOD layer and the reinforcement member. The reinforcement member's lower coefficient of linear expansion allows it to maintain dimensional stability during thermal cycling, preventing excessive contraction of the FOD layer that would otherwise cause stress concentration and cracking at the memory chip peripheral portion.
Solution Approach 2:
The reinforcement member is positioned beforehand at the peripheral portion of the FOD layer to provide structural support and cushioning. This pre-positioned reinforcement prevents the FOD layer from contracting excessively during cooling, thereby cushioning against the development of cracks in the memory chip peripheral portion during subsequent temperature cycle tests.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The reinforcement member effectively reduces stress on the memory chip's peripheral portion, preventing cracks and allowing controlled FOD layer behavior, thus enhancing the reliability of semiconductor packages.
Implementation Method 1
The reinforcement member has a first coefficient of linear expansion lower than a second coefficient of linear expansion of the first resin layer
Data Source
AI summary
According to one embodiment, a semiconductor device includes a wiring board having a first surface. A first element is disposed on the first surface of the wiring board. A first resin layer covers the first element. A second element is larger than the first element and disposed on the first resin layer. The second element is superposed above the first element. A reinforcement member is disposed at a peripheral portion of the first resin layer and includes an edge disposed inside of the first resin layer. The reinforcement member has an upper surface above the first surface of the wiring board. The reinforcement member has a coefficient of linear expansion lower than the first resin layer. An encapsulating resin material, over the first surface of the wiring board, covers the first element, the second element, the first resin layer, and the reinforcement member.


