Relaxation oscillation circuit
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Solution Overview
Problem
Existing relaxation oscillating circuits face issues with parasitic capacitors affecting frequency accuracy and temperature stability, particularly in constant current mode, where parasitic capacitors introduce inaccuracies and instability as oscillation frequency increases.
Innovation Solution
The proposed relaxation oscillating circuit employs isolating transistors to mitigate the influence of parasitic capacitors, using current mirror modes and cascode structures to control charging and discharging processes, along with a bias circuit providing temperature-independent currents to enhance accuracy and stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a constant current mode is used to change oscillation frequency by trimming current, then the switch is outside the oscillating loop avoiding switch resistance influence, but parasitic capacitor of the current transistor affects accuracy and temperature stability especially when oscillation frequency increases
Solution Approach 1:
The patent introduces an isolating transistor as an intermediary component between the current source transistor and the oscillating loop. This isolating transistor acts as a mediator that blocks the parasitic capacitor of the current source transistor from directly affecting the oscillating loop, thereby resolving the contradiction between avoiding switch resistance influence and maintaining frequency accuracy.
2Speed
If the oscillation frequency is increased, then the clock signal speed improves, but the parasitic capacitor effect becomes more significant reducing accuracy and temperature stability
Solution Approach 1:
The isolating transistor serves as a buffer that decouples the high-frequency oscillating loop from the parasitic capacitor of the current source transistor. This allows the system to operate at higher frequencies for improved clock signal speed while the isolating transistor prevents the parasitic capacitor from degrading frequency accuracy and temperature stability.
3Measurement precision
If isolating transistors are introduced to block parasitic capacitors, then frequency accuracy and temperature stability improve, but circuit complexity increases
Solution Approach 1:
The patent uses isolating transistors configured as simple switches controlled by clock signals to block parasitic capacitors. While this does increase component count, the isolating transistors are implemented in a straightforward manner that minimizes additional complexity, achieving frequency accuracy improvement with relatively modest increases in circuit structure.
Data Source
Figure 1~2
Figure 3~4
AI summary
Provided is a relaxation oscillating circuit, which comprises a charging circuit, a discharging circuit, a switch circuit, a charging-discharging capacitor and an output circuit. The charging circuit comprises a first current source transistor and a first isolating transistor. The discharging circuit comprises a second current source transistor and a second isolating transistor. The switch circuit comprises a main charging transistor and an auxiliary charging transistor arranged in current mirror mode and a main discharging transistor and an auxiliary discharging transistor arranged in current mirror mode. The first isolating transistor is connected to the main charging transistor and the auxiliary charging transistor, and the second isolating transistor is connected to the main discharging transistor and the auxiliary discharging transistor. The charging-discharging capacitor is connected to the main charging transistor and the main discharging transistor, and the main charging transistor and the main discharging transistor are alternately conducted for half cycle of a clock signal. According to a voltage of the charging-discharging capacitor, the output circuit outputs a clock signal and a control signal which is reversely ahead of the clock signal. The clock signal is connected to gates of the auxiliary charging transistor and the auxiliary discharging transistor, and the control signal is connected to gates of the main charging transistor and the main discharging transistor.