Reliability-Based Memory Programming Delay for Two-Pass Writes
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Solution Overview
Problem
Memory cells in a memory sub-system are susceptible to program disturb due to manufacturing defects and variability, leading to reduced reliability and increased susceptibility to errors during programming operations.
Innovation Solution
A programming delay scheme is implemented based on memory cell reliability, which includes a multi-pass (e.g., two-pass) programming sequence with a controlled delay between passes, particularly for cells with low reliability, to mitigate program disturb and enhance overall reliability and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multi-pass programming is used to improve reliability, then program disturb is mitigated, but programming time increases
Solution Approach 1:
The patent applies different delay strategies to different memory cells based on their individual reliability characteristics. Memory cells are classified into first subset (higher reliability) and second subset (lower reliability), with the second subset receiving longer delays between programming passes. This local differentiation resolves the contradiction by applying reliability-enhancing delays only where needed, rather than uniformly across all cells.
Solution Approach 2:
The patent dynamically adjusts the programming delay parameter based on measured memory cell reliability metrics such as read window budget. By changing the delay parameter adaptively - using longer delays for cells with lower reliability and shorter or no delays for cells with higher reliability - the system optimizes both reliability improvement and programming time efficiency.
2Reliability
If programming delay is increased to mitigate program disturb, then reliability improves, but programming speed decreases
Solution Approach 1:
Different delay durations are applied to different subsets of memory cells based on their reliability characteristics. The second subset of memory cells with lower reliability receives longer delays to mitigate program disturb, while the first subset with higher reliability receives shorter or no delays, thereby maintaining overall programming speed while improving reliability where needed.
Solution Approach 2:
The patent applies delay only partially - specifically to the second subset of memory cells that exhibit lower reliability metrics. This partial application of delay avoids the excessive time penalty that would result from applying uniform delays to all memory cells, while still achieving the necessary program disturb mitigation for the vulnerable cells.
3Reliability
If uniform programming delay is applied to all memory cells, then reliability is improved, but overall programming efficiency decreases
Solution Approach 1:
The patent implements non-uniform programming delays by classifying memory cells into different subsets based on reliability metrics. The first subset receives one delay strategy while the second subset receives a different delay strategy, optimizing both reliability improvement and programming efficiency by avoiding unnecessary delays on already reliable cells.
Solution Approach 2:
The programming delay is made dynamic and adaptive rather than static and uniform. The system measures reliability metrics such as read window budget and adjusts delay duration accordingly for different memory cell subsets. This dynamic approach allows the system to maintain high reliability while preserving programming efficiency by applying delays only when and where necessary.
Data Source
AI summary
A system includes a memory device and a processing device operatively coupled to the memory device. The processing device is to receive a programming command with respect to a set of memory cells. The processing device is further to determine a value of a metric reflecting reliability of a subset of the set of memory cells. The processing device is further to determine a delay based on the value of the metric. The processing device is further to perform a two-pass programming operation with respect to the subset of memory cells. The two-pass programming operation includes the delay.