ReRAM Memory Cell Array Segmentation for Read Margin
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Solution Overview
Problem
Existing semiconductor memory devices using ReRAM technology do not effectively utilize memory cells that have not undergone forming, limiting the storage of information and resulting in a smaller read margin, which affects the reliability of information storage.
Innovation Solution
Incorporating both first and second memory cells into the semiconductor memory device, where the first memory cells are treated with a forming voltage and the second memory cells are not, allowing the second memory cells to store logic values by maintaining a super high resistance state, thereby increasing the read margin.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If forming voltage is applied to all memory cells to enable stable switching between high and low resistance states, then the memory cells can store normal information and control information reliably, but the read margin is reduced because the resistance difference between stored states becomes smaller
Solution Approach 1:
The memory cell array is divided into two distinct groups: first memory cells that undergo forming treatment to store control information, and second memory cells that remain in the unformed state to store normal information. This segmentation allows each group to be optimized for its specific function, resolving the contradiction between reliability and read margin.
Solution Approach 2:
Different regions of the memory cell array are assigned different properties: the first memory cells are treated with forming voltage to achieve stable switching characteristics suitable for control information, while the second memory cells maintain their natural high resistance characteristics to provide large read margin for normal information storage.
2Adaptability or versatility
If forming voltage is applied to memory cells to enable stable memory operation, then the memory cells can switch between high and low resistance states, but memory cells in the unformed state cannot be utilized for information storage
Solution Approach 1:
The memory cell array is designed to serve multiple functions through different cell types: first memory cells store control information required for device operation, while second memory cells store normal user information. This multi-functionality increases overall adaptability without compromising the reliability of either function.
Solution Approach 2:
Instead of treating all memory cells the same way (either all formed or all unformed), the invention inverts the conventional approach by using unformed memory cells for normal information storage and formed memory cells for control information storage, thereby utilizing all cells effectively while maintaining reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the storage of information with a larger read margin, enhancing the reliability of information storage and improving the semiconductor memory device's performance by utilizing memory cells in both formed and unformed states.
Implementation Method 1
a variable resistance element that changes an electrical resistance of the variable resistance element in response to application of a write voltage
Implementation Method 2
a predetermined voltage (i.e., forming voltage) must be applied to the manufactured variable resistance element to form a filament path inside therein
Data Source
AI summary
A semiconductor device includes a memory cell array including a plurality of first and second memory cells each comprising a variable resistance element that establishes an electrical resistance that changes in response to an application of a write voltage after a forming voltage has been applied, the first memory cell to which the forming voltage is applied, and the second memory cell to which the forming voltage is not applied, and the second memory cell being configured to store one of first and second logic values constituting first information, the first and second logic values being different from each other.