ReRAM Program-Verify Scheme Using Opposite Polarity Pulses
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Solution Overview
Problem
Conventional RRAM devices face reliability issues due to stress and damage from increased operation conditions when data storage fails, leading to reduced device lifespan.
Innovation Solution
Implementing a program-verify operation scheme where subsequent pulses after a failed verify operation do not increase in amplitude, instead applying pulses with opposite polarity to reduce stress on the memory element, allowing for successful programming without further strengthening of operation conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the operation conditions are strengthened (greater amplitude and/or longer pulse duration) after a failed program verify, then the programming success rate is improved, but the memory element suffers more stress and damage, reducing reliability
Solution Approach 1:
Instead of strengthening the program pulse amplitude after verification failure, the patent applies a pulse with opposite polarity. This inverts the conventional approach by using reverse polarity pulses to complete the programming process, thereby achieving successful programming without increasing stress on the memory element.
Solution Approach 2:
The patent changes the polarity parameter of the program pulse from the conventional approach of increasing amplitude. By modifying the polarity parameter rather than the magnitude parameter, the system achieves programming success while maintaining consistent stress levels on the memory element.
2Reliability
If incremental step pulse programming with increasing magnitudes is used, then programming reliability is improved, but device stress and damage increase, reducing longevity
Solution Approach 1:
The patent inverts the conventional incremental step pulse programming approach by applying pulses with opposite polarity instead of increasing magnitude. This allows the programming process to be completed successfully without the cumulative stress that would reduce device longevity.
Solution Approach 2:
The opposite polarity pulse serves as a preliminary anti-action that counteracts the incomplete programming state without requiring additional strengthening pulses. This prevents the need for subsequent high-stress operations that would damage the memory element.
3Productivity
If stronger program pulses are applied after verification failure, then the cumulative pass rate is improved, but the memory element experiences increased stress, reducing device reliability
Solution Approach 1:
Instead of increasing pulse strength to improve cumulative pass rate, the patent uses opposite polarity pulses to complete programming. This maintains device reliability while achieving high cumulative pass rates by fundamentally changing the approach to handling verification failures.
Solution Approach 2:
The patent changes the controlling parameter from pulse amplitude to pulse polarity. This parameter change enables the system to improve cumulative pass rate without the harmful side effect of increased stress on the memory element.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and longevity of RRAM devices by minimizing stress on the memory elements, achieving a cumulative pass rate exceeding 97% without the need for incremental step pulse programming with increasing magnitudes.
Implementation Method 1
Resistive random access memory (RRAM) is a type of nonvolatile memory that includes metal oxide material which changes resistance between two or more stable resistance ranges by application of electrical pulses at levels suitable for implementation in integrated circuits.
Data Source
AI summary
Circuitry coupled to a programmable element comprising metal oxide is configured to execute a program-verify operation including: an initial cycle of a program operation and a verify operation, and subsequent cycles. The initial cycle includes an initial instance of the program operation to establish a cell resistance of the programmable element, and an initial instance of the verify operation to determine whether the cell resistance of the memory cell is within the target resistance range. At least one of the subsequent cycles includes an additional pulse having a second polarity to the programmable element, and a subsequent instance of the verify operation. The first polarity of the initial program pulse and the second polarity of the additional pulse have opposite polarities. A subsequent instance of the program operation includes applying a subsequent program pulse having the first polarity to the programmable element.


