Residue Transfer Loop for High-Precision Noise-Shaping SAR ADCs
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Solution Overview
Problem
Achieving ultra-high precision residue transfer in Sigma-delta noise shaping successive approximation register analog-to-digital converters (SAR ADCs) is challenging, particularly in transferring residues around 1 mV, which is crucial for improving conversion accuracy.
Innovation Solution
A residue transfer loop is designed, comprising a sampling switch module, logic controlling circuit, residue holding capacitor module, DAC capacitor array, residue transfer module, current rudder, reset switch module, and charge sharing switch module, forming a differential structure to sequentially control and share charges for accurate residue transfer and accumulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional SAR ADC structure is used, then the structure is simple and power consumption is low, but the conversion precision cannot achieve ultra-high precision level
Solution Approach 1:
The patent segments the residue transfer process into multiple stages using a tree-structured capacitor array. The capacitor array is divided into multiple levels (first level, second level, etc.), where each level handles specific bit resolutions. This segmentation allows the system to achieve ultra-high precision by progressively refining the residue transfer in stages, rather than attempting to transfer the entire residue in a single step.
Solution Approach 2:
The patent implements a nested structure where multiple capacitor arrays are hierarchically organized. The first-level capacitor array handles higher-resolution bits, while the second-level capacitor array handles lower-resolution bits. Each level is nested within the overall conversion process, with the residue from one level being processed by the next level. This nested architecture enables the system to achieve ultra-high precision while maintaining a structured and manageable design.
2Measurement precision
If the residue amount is around 1 mV for 12-bit resolution, then the basic SAR ADC function is achieved, but transferring this small residue to achieve ultra-high precision becomes the key difficulty
Solution Approach 1:
The patent employs dynamic switching mechanisms to adaptively control the residue transfer process. The switching circuitry dynamically connects and disconnects different capacitor arrays based on the current residue magnitude and the required precision level. This dynamic operation allows the system to efficiently handle the small 1 mV residue by selectively engaging appropriate capacitor levels, thereby achieving accurate residue transfer without excessive complexity.
Solution Approach 2:
The patent introduces intermediate capacitor arrays as mediators in the residue transfer process. Instead of directly transferring the small residue to the final output, the system uses intermediate capacitor levels to progressively amplify and refine the residue signal. Each intermediate level acts as a mediator that transforms the small residue into a more manageable form for subsequent processing, thereby facilitating accurate ultra-high precision conversion.
3Measurement precision
If a residue transfer loop is implemented to achieve ultra-high precision, then conversion accuracy is improved, but the device complexity and control requirements increase
Solution Approach 1:
The patent implements a periodic control scheme where the residue transfer loop operates in regular cycles. Each cycle includes standardized phases for sampling, holding, and transferring residues through the tree-structured capacitor array. This periodic operation simplifies the control logic by establishing a predictable rhythm, allowing the same control circuitry to be reused across multiple conversion cycles rather than requiring complex adaptive control for each operation.
Solution Approach 2:
The patent utilizes parameter changes in the capacitor array configuration to manage complexity. By dynamically adjusting the effective capacitance values and connection topologies based on the current conversion stage, the system can achieve ultra-high precision without requiring a completely different circuit architecture for each precision level. The same physical hardware adapts its parameters to meet different precision requirements, thereby controlling overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables first-order noise shaping and higher conversion accuracy by transferring and accumulating the residue error, effectively multiplying low-frequency noise to high frequencies for filtering, thereby achieving ultra-high precision.
Implementation Method 1
the residue transfer module is configured to output a static working current from the current rudder to the residue holding capacitor module for charging based on the control of the differential residue signal and the logic controlling circuit
Implementation Method 2
the charge sharing switch module is configured to share charges between the residue holding capacitor module and the DAC capacitor array under control of the logic controlling circuit after the DAC capacitor array finishes sampling
Implementation Method 3
the sampling switch module is configured to start under control of the logic controlling circuit, input differential analog signals from external to the DAC capacitor array, so that the differential analog signals are sampled by the DAC capacitor array
Data Source
AI summary
A residue transfer loop, a successive approximation register analog-to-digital converter and a gain calibration method are disclosed. In particular, the residue transfer loop includes a sampling switch module, a logic controlling circuit, a residue holding capacitor module, a DAC capacitor array, a residue transfer module, a current rudder, a reset switch module and a charge sharing switch module. The logic controlling circuit sequentially outputs control signals according to preset time intervals in a preset period to control the reset switch module, the residue transfer module, the sampling switch module and the charge sharing switch module to work sequentially, thereby realizing a residue transfer.