Resin Layer Plan View Pattern for Semiconductor Package Warping

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Solution Overview

Problem

Conventional Package-on-Package (PoP) technology faces challenges in suppressing warping of semiconductor packages due to thermal expansion differences between the board and semiconductor chip, leading to bonding failures and reduced reliability, especially with increasing demands for thinner and faster semiconductor devices.

Innovation Solution

A semiconductor device configuration featuring a first resin layer and a second resin layer with differing plan view patterns, where the second resin layer extends more towards the corners than the edges, creating a downward force at corners and upward force at edges to cancel warping stress, thereby suppressing smile warping and enhancing bonding reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single-layer resin structure is used to cover the semiconductor chip, then the manufacturing process is simple, but warping occurs due to thermal expansion differences between the board and semiconductor chip

Engineering Contradiction:
Improveresin layer structureVSAvoidbonding reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The resin layer is divided into two distinct layers: a first resin layer directly covering the semiconductor chip and a second resin layer covering the first resin layer. This segmentation allows each layer to have different plan view patterns optimized for specific functions, with the first layer suppressing warping and the second layer providing overall protection, thereby resolving the contradiction between structural simplicity and bonding reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first resin layer is designed with a plan view pattern that differs from the second resin layer, creating local quality variations. The first layer's pattern is specifically configured to suppress warping at critical bonding regions, while the second layer provides uniform protection. This local differentiation enables targeted warping suppression without requiring complete structural redesign.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If the resin layer extends uniformly across the entire chip area, then manufacturing is easier, but warping cannot be suppressed effectively

Engineering Contradiction:
Improveresin layer formationVSAvoidpackage warping
Core Design Contradiction:
Ease of manufactureVSShape

Solution Approach 1:

The first resin layer is designed with an asymmetric plan view pattern that does not uniformly cover the semiconductor chip area. Instead, it extends to specific regions optimized for warping suppression, creating an asymmetric distribution that counteracts thermal expansion differences. This asymmetric design effectively suppresses warping while remaining manufacturable through standard molding processes.

Inventive Principle:
Principle #4Asymmetry

3Length of moving object

If conventional single-layer resin structure is used, then device thickness can be reduced, but bonding failures occur due to warping

Engineering Contradiction:
Improvedevice thicknessVSAvoidbonding precision
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The solution transitions from a single-layer resin structure to a two-layer resin structure with different plan view patterns. This dimensional change in the resin layer configuration (from one layer to two layers with different patterns) enables effective warping suppression while maintaining compact device thickness, thereby preventing bonding failures without significantly increasing overall device size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses warping and improves bonding reliability in PoP structures by balancing thermal expansion stresses, addressing the limitations of existing technologies.

Implementation Method 1

The warping is mainly ascribable to difference in coefficient of thermal expansion between the board and the semiconductor chip

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS7635912B2Semiconductor device
Publication Date: 2009.12.22 RENESAS ELECTRONICS CORP
  • US7635912B2 patent drawing
  • US7635912B2 patent drawing
  • US7635912B2 patent drawing

AI summary

A resin layer covering a semiconductor chip on a wiring board is composed of a first resin layer and a second resin layer, wherein the first resin layer and the second resin layer differ in their plan view pattern, satisfying a relation of a<b, where "a" is difference in length in the direction from the center of the board towards the edges between the first resin layer and the second resin layer, and "b" is difference in length in the direction from the center of the board towards the corners between the first resin layer and the second resin layer.