Resistance-Change Programmable Logic Array for Reliable Data Retention

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Solution Overview

Problem

Conventional programmable logic circuits using floating gate transistors face issues with charge retention, increased error rates, and vulnerability to cosmic rays due to finer transistor sizes, leading to reliability concerns, especially in harsh environments.

Innovation Solution

A programmable logic circuit utilizing resistance change type elements, such as spin transistors or MRAMs, arranged in a matrix form to improve writing and retention characteristics, reducing software errors and enabling operation with lower voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If floating gate transistors are made finer to increase integration density, then device scaling is achieved, but charge retention deteriorates and error rates increase

Engineering Contradiction:
Improveintegration densityVSAvoidcharge retention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the fundamental parameter of the storage mechanism from charge-based (floating gate) to magnetic moment-based (spin transistor). By utilizing the spin state (up/down) instead of charge presence/absence, the system achieves both fine scaling and reliable retention, as magnetic moments are inherently more stable at smaller dimensions

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the electrical charge storage mechanism with a magnetic moment storage mechanism. Spin transistors use the quantum mechanical spin property of electrons rather than electrostatic charge, fundamentally substituting one physical mechanism for another to overcome the scaling limitations of floating gate structures

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Ease of manufacture

If high voltage is applied to write charge into floating gate elements, then writing capability is achieved, but circuit load increases and reliability decreases

Engineering Contradiction:
Improvewriting capabilityVSAvoidcircuit reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the writing mechanism from high-voltage charge injection to low-voltage magnetic field application. Spin transistors can be written using relatively low voltages by utilizing spin-polarized current or magnetic field effects, eliminating the need for 10V or higher write voltages required by floating gate structures

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If floating gate structures are used for storage, then basic storage function is achieved, but vulnerability to cosmic rays and software errors increases

Engineering Contradiction:
Improvestorage functionVSAvoidcosmic ray vulnerability
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent employs redundant spin transistor structures where multiple storage elements work together to provide fault tolerance. The system can tolerate certain failures or interference events (such as cosmic ray strikes) by using the redundancy to detect and correct errors, making the storage function more robust against harmful external factors

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses the negative effects of finer storage elements on writing and retention, enhances reliability, and prevents software errors, allowing for robust operation in environments where conventional circuits may fail.

Implementation Method 1

a first memory circuit of resistance change type (251ij) and a second memory circuit of resistance change type (252ij)

Methodology Applied
Scientific EffectResistance change: Electrical Resistance

Data Source

PatentUS8294489B2Programmable logic circuit
Publication Date: 2012.10.23 KIOXIA CORP
  • US8294489B2 patent drawing
  • US8294489B2 patent drawing
  • US8294489B2 patent drawing

AI summary

A programmable logic circuit includes: an input circuit configured to receive a plurality of input signals; and a programmable cell array including a plurality of unit programmable cells arranged in a matrix form, each of the unit programmable cells including a first memory circuit of resistance change type including a first transistor and a second memory circuit of resistance change type including a second transistor, the first and second memory circuits connected in parallel, each gate of the first transistors on same row respectively receiving one input signal, each gate of the second transistors on same row receiving an inverted signal of the one input signal, output terminals of the first and second memory circuits on same column being connected to a common output line.