Resistance Change Memory Standby Leak Current Reduction
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Solution Overview
Problem
Resistance change memory technologies face challenges in minimizing leak currents during standby states, leading to increased power consumption due to the presence of active transistors in leak paths between the power supply and ground potential.
Innovation Solution
The implementation of a resistance change memory design that configures at least two MOS transistors in an off state on each leak path between the power supply voltage terminal and the ground potential terminal, using specific signal control sequences to transition transistors into cutoff states during standby, thereby reducing leak currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If transistors are kept in on state to maintain circuit connectivity, then signal transmission is enabled, but leak current increases and power consumption rises
Solution Approach 1:
The patent implements dynamic transistor state control by introducing control signals (first control signal and second control signal) that transition transistors between on and off states based on operational requirements. During standby state, transistors are switched to off state to eliminate leak current, while during read/write operations, transistors are activated to enable signal transmission. This dynamic state change resolves the contradiction between maintaining connectivity and reducing power consumption.
Solution Approach 2:
The patent employs periodic switching of transistors between on and off states corresponding to different operational phases (standby, read, write). Control signals are periodically activated to transition transistors to on state during operations and back to off state during standby, creating a periodic action pattern that minimizes energy consumption while maintaining operational capability when needed.
2Loss of energy
If transistors are placed in off state to reduce leak current, then power consumption decreases, but circuit connectivity is interrupted
Solution Approach 1:
The patent uses dynamic control signals to switch transistors between off state (during standby to reduce power consumption) and on state (during read/write operations to restore connectivity). The control circuit activates transistors only when operational connectivity is required, thereby resolving the contradiction between power savings and circuit connectivity by making connectivity conditional rather than continuous.
Solution Approach 2:
The patent prepares transistors in off state during standby to minimize power consumption, and uses control signals to activate them in advance before read or write operations begin. This preliminary positioning of transistors in low-power state, with rapid activation capability, allows the system to maintain connectivity only when needed while preserving power savings during idle periods.
3Loss of energy
If multiple transistors are placed in series on leak paths to reduce current, then leak current decreases, but device complexity increases
Solution Approach 1:
The patent uses control signals to make transistors serve multiple functions: during standby state, transistors function as current blocking elements to reduce leak current; during operational states, the same transistors function as signal transmission switches. This multi-functionality allows the system to achieve low leak current without permanently increasing device complexity, as the transistor configuration adapts its function based on operational context rather than requiring separate dedicated components for each function.
Data Source
AI summary
According to one embodiment, a resistance change memory includes a first memory cell, a word line, a first bit line, first and second inverters, first to sixth MOS transistors, and a control circuit. The first transistor is connected to the first output terminal of the first inverter. The second transistor is connected to the second output terminal of the second inverter. The fifth transistor has a first current path whose one end is connected to the first voltage terminal of the first inverter. The sixth transistor has a second current path whose one end is connected to the third voltage terminal of the second inverter. The control circuit makes the first and second transistors a cutoff state by a first signal and makes the fifth and sixth transistors the cutoff state by a second signal in a standby state.