Variable Resistance Memory Cell Distribution Control
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Solution Overview
Problem
Miniaturization of semiconductor memory devices has led to challenges in reliably storing multi-level data due to increased sensitivity to read noise, particularly in high-resistance states, which affects data reliability and precision in resistance varying memory cells.
Innovation Solution
A nonvolatile semiconductor memory device with a memory cell array using a variable resistance element and a control circuit that sets resistance value distributions with increasing widths and distances between them, allowing for improved data storage and write operations by reducing the risk of misreads and enhancing data reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are miniaturized to increase integration, then device density improves, but sensitivity to read noise increases and data reliability deteriorates
Solution Approach 1:
The patent applies different resistance value distribution characteristics to different resistance states. Specifically, the first resistance value distribution (lower resistance) has a narrower width, while the second resistance value distribution (higher resistance) has a wider width. This local differentiation optimizes each state's performance: the narrower first distribution reduces read noise sensitivity for lower resistance states, while the wider second distribution provides better noise margin for higher resistance states, thereby maintaining data reliability despite miniaturization.
2Measurement precision
If resistance value distribution width is increased to reduce read noise impact, then measurement precision improves, but device area increases
Solution Approach 1:
The patent implements non-uniform resistance value distribution widths across different resistance states. The first resistance value distribution has a first width optimized for lower resistance states, while the second resistance value distribution has a second width optimized for higher resistance states. This localized optimization allows each resistance state to have appropriate noise margins without uniformly increasing the overall device area, thus achieving improved measurement precision while controlling device footprint.
3Device complexity
If uniform resistance value distribution widths are used, then device complexity is reduced, but data reliability in high-resistance states deteriorates due to read noise
Solution Approach 1:
The patent employs different resistance value distribution widths for different resistance states to address reliability issues in high-resistance states. The second resistance value distribution (higher resistance) uses a wider width compared to the first resistance value distribution, providing enhanced noise margins specifically where read noise impact is most severe. This targeted approach improves data reliability in high-resistance states without requiring complex uniform adjustments across all states.
Solution Approach 2:
The patent changes the resistance value distribution width parameter based on the resistance state. By setting the second width (for higher resistance states) differently from the first width (for lower resistance states), the system adapts the distribution characteristics to match the specific noise and reliability requirements of each resistance state, thereby improving overall data reliability without uniform complexity increases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances data reliability and precision by increasing the width and distance between resistance value distributions, reducing the impact of read noise and eliminating the need for transitions to high-resistance states, thereby improving the reliability of stored data and write operations.
Implementation Method 1
a variable resistance element; and a control circuit configured to cause data of 2 bits or more to be stored in the memory cell by setting the memory cell to be included in one of resistance value distributions
Data Source
AI summary
A nonvolatile semiconductor memory device according to an embodiment includes a control circuit configured to cause data to be stored in a memory cell by setting the memory cell to be included in one of resistance value distributions. The control circuit is configured to set a first resistance value distribution and a second resistance value distribution, the second resistance value distribution having a resistance value larger than that of the first resistance value distribution, and to set a second width to be larger than a first width, the second width being a width between a second upper limit value of the second resistance value distribution and a second lower limit value of the second resistance value distribution, and the first width being a width between a first upper limit value of the first resistance value distribution and a first lower limit value of the first resistance value distribution.