Resistive Element Vertical Electrode Configuration
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Solution Overview
Problem
Existing resistive elements for semiconductor devices have a large chip size and require multiple bonding wires due to their electrode configuration, which increases complexity and size.
Innovation Solution
A resistive element with a semiconductor substrate, field insulating film, resistive layers, interlayer insulating film, pad-forming electrodes, relay wires, and a rear surface electrode, where the resistive element uses an electric channel between the pad-forming electrode and the rear surface electrode as the resistor, reducing chip size and bonding wires by altering the electrode configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If two electrodes are provided on the top surface of the resistive layer connected to side edges, then the resistive element can be manufactured with conventional processes, but the chip size increases and two bonding wires are required
Solution Approach 1:
The invention changes the electrode configuration from a planar arrangement on the top surface to a vertical arrangement extending from the top surface through the interlayer insulating film to the rear surface. This dimensional transition allows one electrode to be formed as a pad on the top surface while the other electrode is formed on the rear surface, reducing the horizontal space required on the chip.
Solution Approach 2:
The invention segments the electrode configuration into distinct top and rear surface components. The pad-forming electrode is segmented into a top surface pad portion and a vertical connection portion extending through the interlayer insulating film to contact the rear surface electrode. This segmentation allows compact arrangement and reduces the number of bonding wires needed.
2Ease of manufacture
If two electrodes are provided on the top surface of the resistive layer, then the resistive element can be manufactured with conventional processes, but the number of bonding wires increases
Solution Approach 1:
The invention merges the function of multiple electrodes into a single pad-forming electrode structure that serves as one terminal, while the rear surface electrode serves as the other terminal. This merging reduces the number of separate bonding wire connections required from two to one, simplifying the device structure and reducing complexity.
3Area of stationary object
If the electric channel between pad-forming electrode and rear surface electrode is used as the resistor, then the chip size is reduced, but the electrode configuration becomes more complex
Solution Approach 1:
The pad-forming electrode serves multiple functions: it acts as one terminal of the resistor, provides a bonding pad for wire connection, and its vertical connection portion serves as part of the current path through the interlayer insulating film. The rear surface electrode similarly serves as both a terminal and a current path component. This multi-functionality reduces the need for separate components, thereby reducing chip size despite the vertical configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces the chip size and number of bonding wires, enhancing manufacturing efficiency and reducing the complexity of the semiconductor device while maintaining resistance values through adjustable resistive layer connections.
Implementation Method 1
the resistive element uses, as a resistor, an electric channel between the pad-forming electrode and the rear surface electrode
Implementation Method 2
a relay wire deposited on the interlayer insulating film separately from the pad-forming electrode, and including a first terminal electrically connected to another edge of the selected resistive layer and a second terminal provided so as to form an ohmic contact to the semiconductor substrate
Data Source
AI summary
A resistive element includes: a semiconductor substrate; a field insulating film deposited on the semiconductor substrate; a plurality of resistive layers separately deposited on the field insulating film; an interlayer insulating film deposited to cover the field insulating film and the resistive layers; a pad-forming electrode deposited on the interlayer insulating film, and electrically connected to one edges of the resistive layers; a relay wire deposited on the interlayer insulating film separately from the pad-forming electrode, and including a first terminal electrically connected to another edges of the resistive layers and a second terminal provided so as to form an ohmic contact to the semiconductor substrate; and a rear surface electrode provided under the semiconductor substrate to form an ohmic contact to the semiconductor substrate, wherein the resistive element uses, as a resistor, an electric channel between the pad-forming electrode and the rear surface electrode.