Recessed substrate features extend the resistor path without thinning the film, improving high-voltage stability and ESD robustness.
Using copper electrodes with protective gas processing and edge passivation cuts varistor fabrication cost while preserving electrical properties.
Copper-based varistor electrodes are formed on a ceramic body under nitrogen protection and passivation to cut noble-metal cost without oxidation.
Inert gas-filled interlayers in a high voltage impedance device prevent surface leakage, maintaining measurement linearity while reducing device height.
An embedded active cooling chip integrates micro-channels within a semiconductor substrate to dissipate heat from opticondistors.
Nested braking resistor housing with ceramic insulation prevents ground currents while cooling ribs dissipate heat.
A resistive element uses a vertical electric channel between a top pad and rear electrode to reduce chip size.
Barrel plating creates sealed end joints on ceramic bars, eliminating iron cap sealing failures while maintaining high thermal conductivity.
Segmented conductive elements coupled to resistive layers via adhesive and dielectric materials enable efficient heat dissipation in surface mount designs.
Axial hole in rod-shaped shunt resistor controls skin effect for accurate high-frequency current detection.
A vertical interconnect couples partial coil turns across dielectric layers to form an embedded inductor structure.
Nickel plating seals silver terminals against sulfuration without increasing resistor thickness.
Pre-heating filler to a semi-cured state prevents fluidity-induced deformation, ensuring uniform layer thickness and consistent heat dissipation.
Offset chip resistor electrodes with sputtered plating layers increase heat dissipation surface area without enlarging the footprint.
A multi-step anneal sequence decouples resistance from temperature coefficient of resistance in chromium-silicon thin films.