Resistive Memory Thermal Disturb Mitigation via Back-to-Back Programming

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Solution Overview

Problem

Phase change memory (PCM) devices face thermal disturb issues due to heat transfer from programmed adjacent memory cells, leading to data corruption and reduced operational efficiency, particularly in the bit line direction where thermal transfer is not symmetrical and more pronounced.

Innovation Solution

Programming adjacent memory cells in a Back-to-Back (BTB) relationship along the bit line direction simultaneously, utilizing shared SiN regions to minimize thermal disturb by remapping data into pairs and applying specific voltage pulses to reduce heat transfer between cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If adjacent memory cells are programmed sequentially along the bit line direction, then programming can be completed, but thermal disturb occurs causing data corruption in adjacent cells

Engineering Contradiction:
Improvedata integrityVSAvoidthermal disturb
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by remapping data into pairs and identifying back-to-back (BTB) memory cell pairs along the bit line direction before programming. By pre-identifying and grouping BTB pairs, the system can program them simultaneously, preventing thermal disturb from affecting adjacent cells. This preliminary organization of data and cell pairing resolves the thermal disturb issue before the actual programming operation occurs.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent merges the programming operations of adjacent back-to-back memory cell pairs by programming them simultaneously rather than sequentially. This combining of operations ensures that heat is generated uniformly across both cells at the same time, preventing thermal disturb from propagating to adjacent unprogrammed cells. The merging principle directly addresses the thermal disturb problem by changing the temporal sequence of operations.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If programming speed is increased to reduce data bottleneck, then operational efficiency improves, but thermal disturb effects are amplified causing more data corruption

Engineering Contradiction:
Improveprogramming speedVSAvoiddata retention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By pre-remapping data into pairs and identifying BTB memory cell pairs before programming, the system prepares the programming sequence in advance. This preliminary action enables faster simultaneous programming of cell pairs while maintaining data integrity, thus improving productivity without sacrificing reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the programming parameter from sequential single-cell programming to simultaneous multi-cell programming. By modifying the timing and sequence parameters of the programming operation, the system achieves higher throughput through parallel operations while the coordinated timing prevents thermal disturb, thereby maintaining data retention reliability.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If conventional PCM programming is used without remapping, then device complexity remains low, but thermal disturb causes frequent data loss requiring error correction

Engineering Contradiction:
Improveprogramming controlVSAvoidoperational cycles before data loss
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces preliminary data remapping and BTB pair identification as preprocessing steps before programming. While this adds some complexity to the control logic, it dramatically improves reliability by preventing thermal disturb-induced data loss. The one-time preprocessing overhead is outweighed by the elimination of repeated error correction operations across many programming cycles.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces thermal disturb occurrences, extending the number of program/erase cycles before data loss, thereby enhancing the reliability and speed of PCM operations by synchronizing the programming of BTB memory cell pairs.

Implementation Method 1

PCM, as the name implies, uses the change in resistance of a material when it changes phase in order to store data in a non-volatile manner. When GST is heated to a relatively high temperature (e.g., over 600° C.), its chalcogenide crystallinity is lost. The GST cools into an amorphous glass-like state having a high electrical resistance.

Methodology Applied
Scientific EffectPhase change: Phase Change

Implementation Method 2

The phase change in PCM is brought about by heating the phase change material of each memory cell when it is addressed. This can be accomplished by a heater for each memory cell. When the heater is enabled by a current, it heats a chalcogenide alloy (e.g., germanium, antimony and tellurium (GeSbTe) or GST).

Methodology Applied
Scientific EffectJoule heating: Joule Heating

Implementation Method 3

Phase change memory (PCM) devices face thermal disturb issues due to heat transfer from programmed adjacent memory cells, leading to data corruption and reduced operational efficiency, particularly in the bit line direction where thermal transfer is not symmetrical and more pronounced.

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9990995B2Systems having a resistive memory device
Publication Date: 2018.06.05 MICRON TECHNOLOGY INC
  • US9990995B2 patent drawing
  • US9990995B2 patent drawing
  • US9990995B2 patent drawing

AI summary

Systems having a resistive memory device having control circuitry configured to build a data word from remapped data bits from a received data word such that pairs of data bits are mapped to adjacent locations in the built data word, the control circuitry further configured to program the built data word to memory cells coupled to a selected data line such that, during a same program operation, pairs of adjacent memory cells along the selected data line are programmed with the pairs of data.